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Enhanced Annealing of the Main Lifetime Limiting Defect in Thick 4H-SiC Layers

We have studied annealing of the main lifetime limiting defect Z1/2 in thick 4H-SiC epilayers by the application of carbon-implantation/annealing method. Examination of different implantation doses and annealing temperatures showed that finding the optimum conditions is crucial for obtaining carrier trap concentration below 1011 cm-3 in the whole 100 μm epilayer. The carrier lifetime increased from under 200 ns to over 1 μs at room temperature in the samples prepared by optimized carbon-implantation/annealing technique. Fabrication of pin diodes from the improved thick 4H-SiC epilayers confirmed the enhanced conductivity modulation and suitability of this technique for high-voltage bipolar SiC devices.