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Routing-tree construction with concurrent performance, power and congestion optimization

We present a routing-tree construction algorithm that considers multi-objectives of performance, power and congestion concurrently. Congestion is measured with balanced usage of routing resources among layers. Simultaneous buffer insertion and layer assignment tends to produce routing-trees with shorter overall length. Applying the proposed simultaneous algorithm on a subset of routes on a commercial 64-bit microprocessor yielded 9% less repeater usage and 1.5% shorter overall routing-tree length with improved overall performance at the same time, compared to sequential routing-tree construction approach