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Exploiting the Benefits of High-Level Synthesis for Thermal-Aware VLSI Design

In this work, we propose a method that automatically generates a set of functional equivalent systems with unique performance vs. peak temperature, where the starting point is a set of behavioral descriptions for High-Level Synthesis (HLS), and the output the Pareto-optimal systems. This is accomplished by leveraging one of the main benefits of C-based VLSI design: The ability to automatically create functional equivalent circuits with unique area vs. performance trade-offs from a single behavioral description. The proposed method is built around three main phases. The first phase performs a design space exploration on each module given as a behavioral description for HLS to obtain a trade-off curve of dominating micro-architectures. The second phase builds different systems by combining different mixes of micro-architectures. Finally, phase 3 continues by selectively floorplanning these micro-architectures in the system to obtain a trade-off curve of Pareto-optimal systems. Experimental results targeting a FPGA show that our proposed method works well.