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DC and analog/RF comparisons of Si- and Ge- nanowire schottky barrier transistors

The DC and analog/RF performance of p-channel Schottky barrier Si and Ge nanowire transistors are simulated and some impact factors are studied. The results suggest that 100meV and 50meV are the most optimized Schottky barrier height for intrinsic gain and cutoff frequency respectively. Thinner nanowires enhance the drivability of silicon devices while impair that of germanium devices. With gate length scaled down, the intrinsic gain degrades, but cutoff frequency and intrinsic delay benefit from smaller capacitances.