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Analyzing NBTI impact on SRAMs with resistive-open defects

Density's increase in Static Random Access Memory (SRAM) has become an important concern for testing, since new types of defects that may occur during the manufacturing process are generated. In parallel, the increasing need to store more and more information has resulted in SRAMs that occupy the greatest part of Systems-on-Chip (SoCs). On the one hand, these manufacturing defects may lead to dynamic faults, considered one of the most important causes of test escape in deep-submicron technologies. On the other hand, the SRAM's robustness is considered crucial, since it may affect the entire SoC. In this context, one of the most important phenomena to degrade SRAM reliability is related to Negative-Bias Temperature Instability (NBTI), which causes memory cells' aging. In this context, the paper proposes to analyze the impact of NBTI in SRAM cells with weak resistive-open defects that can escape manufacturing test due to their dynamic behavior and, with aging, may become dynamic faults over time. The proposed combined analysis has been performed using SPICE simulations adopting a commercial 65nm CMOS technology library.