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A Variable-Latency Architecture for Accelerating Deterministic Approaches to Stochastic Computing

Traditional Stochastic Computing methods suffer from high latency due to the required bit stream length and the area incurred from generating them. Using deterministic bit streams reduces this area, greatly improves latency, and produces fully-accurate results. However, even though latency is improved, it is still high. This paper presents multiple novel, variable-latency architectures which exhibit superior performance and energy efficiency when compared to current state-of-the-art designs.