{'fraction_non_alphanumeric': 0.026582278481012658, 'fraction_numerical': 0.002531645569620253, 'mean_word_length': 5.483606557377049, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Design-dependent Monitors Based on Delay Sensitivity Tracking

Design-dependent timing monitors are used on-chip to trace the timing variability of critical paths w.r.t. process, voltage and temperature (PVT) fluctuations. A sensitivity-based design-dependent timing monitor mimics the timing behavior of a group of critical paths by matching their delay sensitivities. With the target of fortifying the existing design-dependent ring oscillators (DDROs), different algorithms for sensitivity matching are investigated in this work. Moreover, different methods for characterizing the building blocks of DDROs are thereby exploited and a method to evaluate the quality of synthesized DDROs is described. An industrial technology node below 40nm is used for evaluating the presented approach.