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Configurable SID-based multi-core simulators for embedded system education

With the emerging of multi-core designs for embedded systems, there is a need of multi-core simulation tools for courseware and class experiments. In this paper, we present a multi-core SID-based simulation framework useful for exercises and hands-on labs for embedded multi-core courses. The SID is a component-based simulation framework upon which a set of simulation components, such as processors, memory, DMAs, LCDs, and other peripherals are built. Our tool includes ingenious MPU IP, and PAC DSP IP with distributed register files. Each of the components is attached with an interconnection adaptor. The adaptor in our design enables the simulation to be done in the functional layer or in the TLM layer for the interconnection networks. Besides, the communication performance of the system can be evaluated in different types of interconnection networks. In addition, our tool supports profiling capability and time-reversible execution, which enables a rich set of experiments in teaching embedded multi-core courses. Finally, we also present a set of possible courses to be based on this set of tools.