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Study of Simultaneous Switching Noise Reduction for Microprocessor Packages by Application of High-K MIM Decoupling Capacitors

This paper describes the effect of using an on-die metal High-K metal-insulator decoupling capacitor (ondie High-K MIM DECAP) in reducing simultaneous switching noise (SSN) for microprocessor packages. The SSN reduction for microprocessor packages due to on-die High-K MIM DECAP added to the IOpower delivery network (IO-PDN) is described using data eye-diagram as a key figure of merits. The power integrity performance of the microprocessor packages, which in turn directly effects the signal integrity is discussed in terms of the resonant free target input impedance and the power-ground noise voltage due to IO switching current of large magnitude through the effective loop inductance of the IOPDN. For the purpose of accurate analysis and to provide design guidelines a distributed circuit model of the on-die High-K MIM DECAP, which is developed based on its physical implementation, is described in the paper. Using this distributed model, SSN modeling and simulation results for signal integrity performance of the microprocessor package with DDR interfaces is discussed throughout this paper.