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GALS design of ECC against side-channel attacks — A comparative study

Elliptic Curve Cryptography (ECC) represents the state-of-the-art of public-key cryptography. It is very computation intensive and hardware consuming for ASIC implementation. In this work, an ECC processor based on the Globally Asynchronous Locally Synchronous (GALS) design is presented. Attention has been paid on the resistances of GALS design against side-channel attacks (SCAs). The pausible clocking scheme, with random hopping of clock frequencies, is applied as a countermeasure of SCAs with low overhead on hardware. A comparative study between the synchronous and the GALS designs of ECC, in terms of the SCA resistance, processing efficiency, and hardware costs, is further elaborated.