{'fraction_non_alphanumeric': 0.01936026936026936, 'fraction_numerical': 0.006734006734006734, 'mean_word_length': 5.128865979381444, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Real-time implementation of the multistage detector for next-generation wideband CDMA systems

The multistage detection algorithm has been widely accepted as an effective interference cancellation scheme for next generation Wideband Code Division Multiple Access (W-CDMA) base stations. In this paper, we propose a real-time implementation of this detection algorithm in the uplink system, where we have achieved both high performance in the interference cancellation and computational efficiency. When interference cancelation converges, the difference of the detection vectors between two consecutive stages is mostly zero. We recode the estimation bits, mapping from plus or minus 1 to 0 and plus or minus 2. Bypassing all the zero terms saves computations. Multiplication by plus or minus 2 can be easily implemented in hardware as arithmetic shifts. The system delay of a three-stage detector can be reduced by half with satisfactory bit error rate. We also propose a VLSI implementation of this algorithm that has the potential of real-time performance. The detector handling up to eight users with 12-bit fixed point precision was fabricated using a 1.2 micrometer CMOS technology.