{'fraction_non_alphanumeric': 0.016353229762878167, 'fraction_numerical': 0.003270645952575634, 'mean_word_length': 5.408376963350785, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Reduced overhead soft error mitigation using error control coding techniques

Soft errors are one of the biggest reliability challenges for present day electronic devices. With technology scaling, the contribution of soft errors to overall device failure is on the rise and it is becoming the dominant reliability failure mechanism. Several techniques exist for the detection and correction of soft errors. Reducing implementation overhead is one of the areas which researchers were focusing on, and several optimization techniques are being proposed. In this paper, we propose a novel methodology, using error detection and correction codes to reduce the implementation overhead. We extend the earlier work on delayed capture methodology, and divide the total number of flip-flops into various groups and calculate the check bits for each group. This method exploits the reduction in the fault space which is generated due to single event upsets, and illustrates how the detection and correction implementation overheads can be minimized. Experimental results highlight the effectiveness of this technique. As compared to the original implementation, 44.80% reduction in area is obtained, without sacrificing the coverage.