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Performance Variability Analysis of the OpenSPARC Architecture on FPGAs

As the trend towards increasing semiconductor miniaturization continues, maintaining uniform performance of integrated circuits in manufacturing becomes difficult. FPGA design software takes this variability along with other factors such as temperature into consideration when determining timing constraints. This paper explores the variability of the maximum achievable frequency of the OpenSPARC T1 architecture implemented on two Xilinx FPGA boards at multiple temperatures.