{'fraction_non_alphanumeric': 0.03143712574850299, 'fraction_numerical': 0.019461077844311378, 'mean_word_length': 4.817391304347826, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
A CMOS injection-locked frequency divider with FSK signal deviations for high-order division

In this report, an injection-locked frequency divider (ILFD) was designed and realized using the 0.13 /spl mu/m CMOS technologies. It not only demonstrates a variable self-oscillation frequency from 300 MHz to 4.7 GHz adjusted by the controlled voltages, but also exhibits the divider performance with a wide locking range for division ratios of 2, 4 and 6 as the self-oscillation frequency fixed to 2.5 GHz. The transient responses in ILFD, the FSK signal deviations through the frequency down-conversion operation have been demonstrated for the high-order division ratios.