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An Improved Performance Ka-Band Low Noise Amplifier and On-Chip Transmission Line Modeling in 0.18 μm CMOS Technology

In this paper, an improved performance Ka-Band 28 GHz LNA is designed using standard 0.18 μm CMOS technology. The designed LNA has 11.5 dB gain and a 3.35 dB noise figure at center frequency of 28 GHz, with 20.6 mW power consumption. By using an extra spiral inductor as a matching circuit between stages and using three similar source degenerated common source stages, our designed LNA has better results over the designed bandwidth compared to similar reported 0.18 μm CMOS LNAs (24–32 GHz). In another section, we proposed an on-chip transmission line modeling for 0.18 μm CMOS technology, which can be used for IC design at millimeter wave frequencies (MMICs). As the structure of on-chip microstrip differs from the modeled structure, two parameters of the proposed model need to be modified according to full-wave simulations. By choosing proper parameters, the proposed model can reduce electromagnetic (EM) simulations time and is valid with enough accuracy up to mm-wave frequencies.