{'fraction_non_alphanumeric': 0.015163002274450341, 'fraction_numerical': 0.0, 'mean_word_length': 5.111111111111111, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Method to Accurate Define Dimensions of Copper Traces

The robustness and dimensions of metal trace is important for electronic packaging applications. For example, materials with good electrical conductivity are essential for reducing IR drops for integrity of electrical signals. Copper metal has good electrical conductivity and hence is the major materials used in electronic packaging. For example in PCB industry, the common methods to form copper trace on a PCB substrate are subtractive and semi-additive method. As packaging density increase, subtractive method no longer satisfies the electrical performance needs since it is very difficult to control the CD loss and uniformly of the metal trace. Semi additive method has a better control of dimensions; however, some CD is lost due to the etching of seed layers. In wafer level packaging, the packaging density increases further. To assure well defined copper traces are more critical. In this paper, we describe methods to accurately keep the original dimensions of the copper trace. We have developed three processes to enhance the semi additive process commonly used in the advanced PCB industry. The dimensions of copper trace are preserved by these methods. These three enhanced semi additive plating processes are described and compared in this paper.