{'fraction_non_alphanumeric': 0.042899408284023666, 'fraction_numerical': 0.011834319526627219, 'mean_word_length': 4.595041322314049, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Fast modular multiplication with carry save adder

An implementation algorithm for modular multiplication is proposed based on Koc's sign estimation technique. The main computation for the algorithm is divided into two parallel parts, i.e. computing 2T mod N and computing P=P+a/sub j/T (mod N). Since the two parts use the sign estimation technique, the n-bit addition carry chain can be reduced to 4-bit addition. This makes the circuit clock frequency high. One n-bit modular multiplication is completed every n+1 clock cycles. For n-bit exponent and n-bit modulus, the time and hardware cost are 1.5n(n+1) clock cycles and 20n gates count with CSA technique, respectively.