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Latency Insensitive Design : Dynamic and static scheduling with proper formal devices

The theory of latency-insensitive design (LID) was recently invented to cope with the time closure problem in otherwise synchronous circuits and programs. The idea is to allow the inception of arbitrarily fixed (integer) latencies for data/signals traveling along wires. Then mechanisms such as shell wrappers and relay-stations are introduced to "implement" the necessary back-pressure congestion control. As a result the LID is behaviourally equivalent to the synchronous specification, avoid starvation, deadlock and congestion of local synchronous IP. We first revisit the formal modeling of relay stations and shells, and provide a number of properties establishing the soundness of our models. Then we face the issue of latency and throughput "equalization" and moreover the problem of the rational solution that we solve with a "fractional register".