{'fraction_non_alphanumeric': 0.013641133263378805, 'fraction_numerical': 0.001049317943336831, 'mean_word_length': 5.317880794701987, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Context Save and Restore of Partial Reconfiguration Regions for Xilinx FPGAs

Preemption is an important technique used by modern operating systems to achieve multitasking. When FPGAs need to be integrated into the preemptive multitasking mechanisms of an operating system, a context switch of the design configured into the FPGA is required. Several proposals on how to take advantage of such a context switch by saving and restoring the internal state of an FPGA have been presented in the past. Unfortunately, these discussions give neither much of the technical details of the save and restore mechanism itself, nor are they available for modern FPGAs like Ultrascale-Series. This paper summarizes the technical details of these officially unsupported techniques to save and restore the internal state of modern Xilinx FPGAS (namely 7-Series and Ultrascale-Series) which are currently scattered over several other publications and technical manuals.