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Innovative use of TCAD Process Simulation for Device Failure Analysis

The complex 3D structure of FinFET device has posed new challenges for Physical Failure Analysis (PFA) since its introduction in the 22nm technology node. FinFET process is complicated which could translate into different variation of defects in the device. This will inadvertently make it challenging to pinpoint the exact process step where the defect was introduced. Through TCAD process simulation, a digital twin of the actual device can be created based on actual layout and process, from which the defect formation mechanism can be identified. In this work, we showcase the innovative use of Sentaurus Process Explorer (SPX) TCAD simulation to produce a structurally accurate FinFET process model that could model real-life defective FinFET device to gain useful insight during failure analysis.