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Performance enhancement of two-phase quasi-delay-insensitive circuits

Two-phase quasi-delay-insensitive circuits control the data-paths by alternating the working-phase and idle-phase. Although the use of Martin's Q-element simplifies the design of such circuits, sequential execution of idle-phases, which consume as much time as working-phases, prevents high-speed circuit operation. The auto-sweeping module (ASM) proposed here allows parallel execution of an idle-phase with the working-phase of the next stage. A few extra circuits are inserted in order to use ASM for every micro-operation. A simulation study shows that ASM accelerates the average speed of a multiplier by 58 percent without any increase in the total number of gates.