{'fraction_non_alphanumeric': 0.022556390977443608, 'fraction_numerical': 0.0, 'mean_word_length': 5.2421875, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Performance Analysis of an Efficient D Flip-Flop Based Linear Feedback Shift Register Using CMOS Technology

In this paper, average power, delay, power delay product and leakage feedback technique is applied for linear feedback shift registers. The design of low-power digital system is crucial using low power flip-flops. As Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices are minimized to ranges which are in nanometer and Complementary MOS (CMOS) circuit’s total Power consumption is given a new definition. In today’s world leakage power tends to play a major role in total power consumption due to the integration of millions of components and shrinking process technology. In this paper, the linear feedback shift registers are designed and their performances are analyzed.