{'fraction_non_alphanumeric': 0.012096774193548387, 'fraction_numerical': 0.0016129032258064516, 'mean_word_length': 5.267676767676767, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Pattern Continuity Check Approach to Model Effective Thermal Conductivity of PCB

The size of semiconductor chip is getting smaller, and the power density is also increasing due to reduction of heat source size. Accurate thermal modeling of PCB, which is the primary heat conduction path of heat generated from a chip, is important for accurate temperature prediction. Especially when hotspot occurs, PCB modeling is important because spreading resistance is an important factor. A common PCB modeling method is to calculate the effective thermal conductivity using the area ratio of dielectric part and metal pattern in the trace layer. However, area ratio approach is not proper for representing real patterns because effective thermal conductivity is not only a function of area ratio, but also physical shape of trace pattern. Although there were continuous efforts to extract effective thermal conductivities in many ways, it was difficult to classify physical structure effectively. The continuity check approach is proposed to model effective thermal conductivity of PCB trace layer. The calculation time can be reduced by more than 50 times even though the difference from the result through the existing detailed modeling is small.