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Analysis and Experimental Verification of Overvoltage Suppression in a Hybrid DC Circuit Breaker

Sequential tripping with energy balancing control in dc hybrid circuit breakers (HCBs) has shown to be an effective strategy in reducing the peak fault current and fault interruption time. However, the inevitable voltage overshoots during the tripping process need to be suppressed. Increasing turn-off gate resistance of a semiconductor switch to suppress its overvoltage is a simple method, which has been avoided in power converter applications because of its additional losses. These additional power losses, nevertheless, are not problematic in HCB applications. This paper analyzes the HCB overvoltage with respect to the switch gate resistance, and experimentally compares the performance and capability of the gate resistance method with the conventional snubber circuit solution in terms of overvoltage suppression and sequential tripping. Hardware verification corroborates the theoretical analysis and demonstrates that both methods can reduce the voltage overshoots while maintaining similar energy balancing results.