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Radiation-hard ASICs for optical data transmission

We have designed two ASICs for possible applications in the optical links of a new layer of the ATLAS pixel detector for the initial phase of the LHC luminosity upgrade. The ASICs include a high-speed driver for a VCSEL and a receiver/decoder to extract the data and clock from the signal received by a PIN diode. Both ASICs contain 12 channels for operation with a VCSEL or PIN array. Among these channels, the outer four channels are designated as spares to bypass a broken PIN or VCSEL within the inner eight channels. The receiver/decoder ASIC also contains a PMOS low dropout regulator block with variable output. The ASICs were designed using a 130 nm CMOS process to enhance the radiation-hardness. The fabricated receiver/decoder ASIC properly decodes the bi-phase marked input stream with low PIN current. We are able to program the ASIC to bypass a broken PIN. The power-on reset circuit is also successfully implemented which sets the ASIC to a default configuration with no signal steering. The performance of the voltage regulator is satisfactory. We are awaiting the delivery of the VCSEL driver but some of the salient features of the design will be described.