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Improving Electric Contacts to Two-Dimensional Semiconductors

Electrical contact resistance to two-dimensional (2D) semiconductors such as monolayer MoS_{2} is a key bottleneck in scaling the 2D field effect transistors (FETs). The 2D semiconductor in contact with three-dimensional metal creates unique current crowding that leads to increased contact resistance. We developed a model to separate the contribution of the current crowding from the intrinsic contact resistivity. We show that current crowding can be alleviated by doping and contact patterning. Using Landauer-B\"uttiker formalism, we show that van der Waals (vdW) gap at the interface will ultimately limit the electrical contact resistance. We compare our models with experimental data for doped and undoped MoS_{2} FETs. Even with heavy charge-transfer doping of>2x10^{13} cm^{-2}, we show that the state-of-the-art contact resistance is 100 times larger than the ballistic limit. Our study highlights the need to develop efficient interface to achieve contact resistance of<10 {\Omega}.{\mu}m, which will be ideal for extremely scaled devices.


I. Introduction
Two-dimensional (2D) semiconductors such as MoS2 has shown a lot of promise for future transistor technology due to their sub-nanometer thickness and lack of out-of-plane dangling bonds. As the transistor channel lengths are scaled below 10 nm, we need a thinner channel to allow better gate control. In the case of 3D materials such as silicon, reduction in channel thickness below 4 nm causes drastic degradation in transport properties [1]. On the other hand, the layered nature of 2D materials with sub-1 nm monolayer (1L) thickness allows shorter channel length without degrading transport properties [2]. However, despite remarkable intrinsic properties such as mobility and reduced short channel effects, the performance of 2D field effect transistors (FETs) is strongly limited by the high contact resistance (RC) [3]. Besides FETs, the electrical contact resistance is also a major concern for emerging applications of 2D materials such as spintronics [4] and valleytronics [5] that would require carrier injection from metal to 2D semiconductor. So far, contact resistance improvements to 2D materials have been achieved through ultra-clean contact metal deposition [2], doping [6], lithiation-induced phase change [7], , inserting insulators between metal and semiconductor (MIS) [8], and work function engineering [2], [9]. The best contact resistance, especially for 1L 2D materials, remains more than an order of magnitude higher (1 to 2 kΩ·μm or larger) than what is needed to demonstrate devices near their scaling limits (~50 Ω·μm) [3]. Such high contact resistances make it difficult to scale the FETs channel lengths as the device will be strongly dominated by the contact resistance [2].
To reduce the contact resistance further than the state-of-the-art, we need to understand the underlying physics. Recent works have focused on understanding the Fermilevel pinning in 2D materials [10] and understanding the carrier injection from metal to 2D materials [11]- [13]. Experimentally, researchers have tried to uncover the interface chemistry between metals and 2D materials [14]. Even though there is a growing interest, the literature so far fails to provide a holistic picture of electrical contacts to 2D materials.
In this paper, we provide a thorough understanding of the contact physics for 2D materials by isolating the extrinsic and intrinsic effects of the contact resistance. We achieve this by using a combination of ab-initio simulations, finite element simulations, fundamental limit calculations based on Landauer Buttiker formalism, and compact modeling. Such multiscale approach, as we will show later, is essential to get a complete picture of factors affecting contact resistance especially for novel technologies such as 2D materials. In addition to our multiscale simulation approach, we also fabricate transmission line method (TLM) structures to measure the contact resistance in real devices and compare these results with our simulations.
We quantify the current crowding based on the material thickness, carrier doping, contact geometry, carrier transport anisotropy, Schottky barrier height, and the "electrostatic doping" using back-gate. To further understand and optimize the current crowding, we propose two alternate contact architectures. We show that we can significantly reduce the contact resistance by patterning the contacts and managing the current crowding. In the second part, we calculate the fundamental (ballistic) limits of contact resistance for 2D materials. Using the transfer matrix method (TMM), we develop a model for carrier transmission at the contacts. We compare our simulation results with the experimental measurements and use the understanding to provide guidelines to further reduce the contact resistance below 50 Ω·μm

II. Results and Discussions
The effective contact resistivity at the metal-semiconductor interface can be defined as a summation of the intrinsic contact resistivity (ρi) and the extrinsic effects such as the current crowding (C). The effective contact resistivity [15] is given as ρC = ρi + Ct2Dρsemi (1) Here, t2D is the thickness of the channel (~ 0.5 nm to 6 nm) and ρsemi is the resistivity of the channel in units of Ω·μm. The current crowding (C) is defined as the additional resistivity faced by carriers before they are collected at the metal-semiconductor interface.
This parameter 'C' captures the two-dimensional crowding below the contact, which is in addition to 1D crowding considered by the transmission line model (TLM See the methodology section for additional details. Figure 1a shows a typical field effect transistor (FET). The back-gate is 5 nm SiO2.
We keep back-gate open-circuited (not connected to a voltage source) unless specified. The n-type background doping density is assumed to be 10 19 cm -3 , which corresponds to 6×10 11 cm -2 for a 1L MoS2 channel. For a device such as a FET, the extrinsic resistance (or "contact" resistance) includes terms other than the metal-semiconductor contact resistance.
Specifically, in a top-gated FET Rext = RC + RU, where RC is the metal-semiconductor contact resistance and RU is the resistance due to the underlap (see inset of Fig. 1a). For this work, we will only be analyzing the metal-semiconductor contact resistances (RC). We note that the metal being a 3D material does not necessarily form an intimate contact with the 2D material.
As shown in the inset of Fig. 1a, the metals such as gold are more likely to form granular and non-intimate contacts. In addition, a typical metal-semiconductor interface will likely have impurities from the fabrication process. For now, we will neglect these non-idealists to understand current crowding. A FET is used as an example to study the electrical contact resistance. However, this work is relevant to any device that employs carrier injection between a metal and a 2D material.

A. Current Crowding in 2D Contacts
Current crowding has become a concern for modern devices as we increase the drive currents in the transistors and reduce the channel thickness (such as FinFETs and 2D devices). Current crowding has been extensively studied before for silicon transistors [15], [16]. There have been very few studies to understand current crowding in 2D devices [17], [18]. These studies have focused mostly on an empirical understanding of the current crowding in 2D materials and do not quantify the impact of channel thickness on current crowding.
In Fig. 1b Transport anisotropy and doping. The 2D materials tend to exhibit transport anisotropy; that is, due to the layered nature of these materials, the in-plane mobility (μin) is usually larger than the out-of-plane mobility (μout). This anisotropy is emulated in the finite element simulations by a ratio of mobilities, which is equivalent to the ratio of bulk resistivities μin/μout = ρout/ρsemi. Note that ρsemi and ρout are in-plane and out-of-plane bulk We plot the simulated contact resistance (symbols) for different channel thickness (t2D). The black lines are TLM model obtained by fitting the current crowding factor, C. The red dashed lines are the theoretical estimation of current crowding using conformal mapping. For TCAD simulations, we assume an n-type doping density ND = 10 19 cm -3 and carrier mobility of 50 cm 2 V -1 s -1 . (c) Impact of doping and transport anisotropy. The contact resistance extracted from TCAD simulation is shown for two different background doping densities ND = 10 19 cm -3 (circle symbols) and ND = 2×10 20 cm -3 (square symbols) and for isotropic transport (blue) and anisotropic transport (red, ρout/ρin = μin/μout = 10).  Fig. 1c shows contact resistance for isotropic (μin/μout = 1) and anisotropic transport (μin/μout = 10). The in-plane mobility is kept constant during simulations μin = 50 cm 2 V -1 s -1 , which seems reasonable for state-of-the-art 2D materials such as MoS2. As for the previous case, we assume an ideal interface with ρi = 0. With lower μout the resistance faced by the carriers entering the contacts is large, resulting in larger two-dimensional current crowding. As such, we observe that the contact resistance and therefore current crowding increases proportionally with the anisotropy or C ∝ ρout/ρin.
In Fig. 1c, we also increased the background n-type doping of the channel from 10 19 cm -3 to 2×10 20 cm -3 . The qualitative trend of C with anisotropy remains the same but we see a considerable reduction in the contact resistance due to reduced ρsemi. This underlines the need to develop efficient and stable doping methods for 2D materials below the contact to reduce the contact resistance.
Schottky contact depletion and back-gate dependence. So far, we have assumed an ideal interface with an Ohmic contact. However, in real devices, the contact between an undoped semiconductor and a metal tends to be Schottky with a non-zero interface contact resistivity. In such a contact, due to the presence of the Schottky barrier at the interface, carriers below the contact may get depleted or accumulated depending on the applied voltage bias to the drain or the gate. In Fig. 2(a), we show the contact resistance for a Schottky barrier height from 20 meV to 100 meV. For Schottky contacts, the contact resistance has a dependence on the VDD and source and drain contact resistances are asymmetric. The calculated RC, therefore, is an average value of both contact resistances. We apply a small drain voltage (VDS = 0.1 V) to avoid introducing significant non-linearity in the contact resistance. Even with such small perturbations (small barrier height and small drain voltage), the TLM model used to extract the RC will show an error and is shown in Fig. 2a-b in the form of error bars.
As seen in Fig. 2a, RC is larger than what we observe in Fig. 1a mainly because of ρi > 0 even for a small barrier height of 20 meV. As we reduce the channel thickness, the RC increases for all the Schottky barrier heights. Especially, it is worth noting that the effect of transport anisotropy is not significant (red and blue lines in Fig. 2a almost overalls). This is because crowding is dominated by the reduced carrier density below the contact and not by the anisotropic mobility. In Fig. 2b, we use the back-gate voltage (VGS = 5 V) to increase the carrier density below the contact. The application of back-gate voltage changes the carrier density distribution by attracting more carriers towards the semiconductor-BOX interface [18]. Though this increases current crowding (more carriers will have to travel larger distance The electron (carrier) density below the contact without applying back-gate is shown for different barrier heights. The carrier density reduces drastically as the barrier height at the contact is increased. Here, t2D = 2 nm, LC = 50 nm. Since the semiconductor thickness is much smaller than the contact dimensions, we have re-scaled the figure disproportionately in x and y-direction to show the electron density in the semiconductor. We assume an n-type doping density ND = 10 19 cm -3 , the in-plane mobility of 50 cm 2 V -1 s -1 , and mobility anisotropy of 10.
Back-gate open before they reach the contact, shown in Fig. 2c), the overall RC is smaller due to a reduction in the contact depletion width. For even thicker semiconductor channels, the impact of increased current crowding might out-weigh the reduction in the contact depletion width and the contact resistance might be worse on applying back-gate voltage. However, such thicker channels (t2D > 6 nm) are not considered in this study. In Fig. 2d, we show the carrier (electron) density below the contact for different barrier heights. As we increase the barrier height, the carriers below the contact get depleted and therefore this results in higher contact resistance. Since this carrier depletion below the contact affects the crowding 'C' as well as Rsh, we could not quantify the 'C' parameter. But empirically we observe C ∝ ϕB 1/2 /t2D.
In experiments, RC tends to increase as the channel thickness is reduced [2], however our simulations do not capture this effect. Firstly, in simulations, we assume that the carrier mobility below the contact remains unaffected. On the other hand, in experiments, it is quite likely that metal deposition degrades the transport properties of the semiconductor below the contact [2]. This is especially true for a few layers of semiconductor and ends up increasing the contact resistance. Secondly, the 2D material properties such as band gap are thickness dependent. As a result, the Schottky barrier heights and other interface properties are different for different channel thickness. Thirdly, we point out that TCAD does not necessarily capture the interaction between metal and semiconductor. This is critical for contacts made to 1L or 2L materials. It has been shown that the metal wavefunction significantly modulates the semiconducting properties of the 2D material below the contact [19]. Lastly, the true nature of carrier injection from semiconductor would vary from deviceto-device. In a device with an ideal contact, the only feasible ways for the carriers to inject from metal to semiconductor is at the contact edge [13]. However, in experimental devices with metal-semiconductor interaction and other non-idealities, we are more likely to have a top injection. Please see Appendix B for additional discussion.
Reducing current crowding by contact patterning. As seen from the previous discussion, we showed that it is possible to optimize the two-dimensional current crowding by doping, reducing the transport anisotropy, reducing the Schottky barrier height, and applying back-gate voltage. We also propose reducing the current crowding and contact resistance by using alternate contact architectures. In an extreme case, if we have an edgeonly contact there would be no current crowding i.e. all the carries will enter the contact directly. Even though the edge contact is predicted to perform better than the top contact [20], the experimental results for the edge contact for 2D materials have so far been sub-par [21]. It is possible to use a combination of "not-so-good" edge and top contacts to achieve a smaller contact resistance than either of edge-only or top-only contacts.
In Fig. 3, we showed two different contact architectures that can manage the current crowding; we pattern fingers (Fig. 3a) and holes (Fig. 3b) into the semiconductor below the contact. Both contacts have been experimentally shown for 1L graphene transistors [22], [23], though with no analysis and optimization. The size of fingers and holes in these experimental contacts are very large for applications to extremely scaled contacts. The pattern dimensions for optimized contacts, as we show, are closely related to the current transfer length or LT, which depends on the sheet resistivity below the contact (Rsh) and the contact resistivity (ρC). Nevertheless, it is possible to achieve patterns of sub-10 nm dimensions by using technologies such as self-assembly [24]. Here we provide a systematic analysis of these contact architecture and develop compact models to estimate and optimize the contact resistance. We further perform finite element simulations and provide a guideline to design optimized contacts. We also show predictions of our compact model against the experimental results for 1L graphene (c) finger contacts and (d) holey contacts [22], [23].
Compact model for patterned contacts and experimental verification. We can use models developed in Eq. 6 and Eq. 7 to explain the experimental data for contacts to graphene transistors (Fig. 3). Smith et al. [23] have fabricated fingered contacts to graphene transistor. We extract the contact resistance from the total device resistance as RC = (Rtotal -  (Fig. 3d). Both experimental results discussed above show an improved contact resistance by patterning the contacts further supporting our theory.
We further use finite element simulations to optimize the contacts and provide guidelines for experimental fabrication. Simulation helps us to capture the current crowding more accurately. To simplify optimization, we assume ohmic contacts. For all simulations we assume t2D = 5 nm, ρtop = 100 Ω•μm 2 , μ = 50 cm 2 V -1 s -1 , and ND = 10 20 cm -3 . This implies sheet resistivity Rsh = 2500 Ω/□ and the current transfer length LT = 200 nm. We also keep the contact length LC = 200 nm. The contact resistance due to the top-only contact (no patterning) is RCtop = 650 Ω·μm. The purpose of the patterning, therefore, is to achieve contact resistance smaller than 650 Ω·μm.
Optimizing fingered contact. In Fig. 4a, we show the impact of the Wf on the contact resistance keeping Nf constant (= 5) and in Fig. 4b we show the impact of the Nf keeping Wf constant (= 10nm). If ρedge > 0.1ρtop, the contact resistance is larger than the toponly contact resistance (RCtop) which is not desirable. From Fig. 4a, we observe that the smaller finger width provides smaller resistance. Thus, the optimized finger width will be limited by the lithographic limitations. From Fig. 4b, we observe that as we increase Nf, we reduce the resistance and it saturates after Nf = 9. This is because, as we further increase Nf the distance between the fingers (Gf) reduces and increased current crowding mitigates the impact of the edge conduction. To further optimize for Gf, we keep Nf = 5 and Wf = 10 nm in  Optimizing holey contact. In Fig. 4d-f, we optimize the holey contact. As seen for fingered contacts, the improvement in contact resistance is observed only if ρedge < 0.1ρtop.
We observe that as we increase the hole diameter (Dh) keeping the number of holes same, the resistance reduces and then saturates (Fig. 4d). The optimal Dh is LT/4, which is equal to 50 nm in this case. In Fig. 4e, we keep the Dh = 50 nm and change the distance of the holes from the contact edge (Lh). If holes are too far away from the edge, the edge conduction does not help. If they are too close to the contact, we lose on the conduction from the top contact. We observe that the optimal Lh is LT/2 (=100 nm) from the contact edge. As seen in Fig. 4f, the optimal distance (Gh) between the holes is 3/2 × LT/4 (= 75 nm). With these optimized values, we observe that the lowest RC ~ 250 Ω·μm for ρedge = 10 -8 Ω•cm -2 , ρtop = 10 -6 Ω•cm -2 , which corresponds to ~62 % reduction in the contact resistance compared to the top-only contact.
From our simulations, we observe that current crowding alone cannot account for a high contact resistance (> 1 kΩ·μm) observed in the literature. Further, it is possible to reduce the current crowding to extremely small value by contact patterning and therefore is not a fundamental limitation. Going back to Eq. 1, it is likely that that the contact resistance is limited due to the intrinsic contact resistivity. We explore this intrinsic contact resistivity in the next section.

Comparison with Experiments
Landauer-Büttiker formalism calculations for contact resistance have been previously done for 3D materials [25], [26] as well as most recently for 2D materials [27]. These studies assumed an ideal transmission which is difficult to realize physically. Here, we model the fundamental limits to contact resistances to 2D materials. We also fabricate TLM structures for 1L MoS2 and compare our model with the measured results.
Calculating modes and transmission. In a real 2D FET, the carrier must pass through multiple barriers before it could reach the channel as shown in Fig. 5a and Fig. 5b.
Because the metal deposition is not uniform, and metal is likely to not have an atomically smooth surface the van der Waals (vdW) gap between the contact metal and the channel semiconductor is going to change as shown in Fig. 5a. To simplify the calculation, we will assume an effective vdW gap with width wB. The carrier travels an average distance proportional to the transfer length (LT). The transmission coefficient (Tr) is then calculated using the transfer matrix method. Figure 5c shows transmission for ϕB = 0 eV, and 0.1 eV.
Note that for energies below the barrier height the transmission is negligible i.e. all the carried are reflected into the contact. These carriers might be able to tunnel through the barriers if there are traps or metallic in the semiconductor. Since our model does not include the trap-assisted tunneling, we are slightly underestimating the transmission. However, the fitted barrier height can be treated as an effective barrier height at the metal-2D contact which includes the effect of traps. In Fig. 5d, we show M2D(ϵ) calculated for single layer MoS2 (Eq. 3). For about 100 meV into the conduction mode, the total number of modes available for conduction is ~2000/μm. This is comparable to the number of modes available in Silicon for a channel of similar thickness [25]. From Fig. 5d, we also note that the M2D(ϵ) increases are we go higher in the conduction band as seen for 3D materials [25]. Using the Tr(ϵ) and M2D(ϵ), we can calculate the contact resistance from Eq. 2.
Comparison with experiments. An atomic force microscopy image of a TLM structure on MoS2 doped with anisotropic AlOx is shown in Fig. 6a. Using the TLM structure, we extract RC for different back-gate voltages (and carrier density) [additional information regarding contact resistance extraction can be found in Ref. [28]]. Fig. 6b shows calculated intrinsic RC assuming Tr (ϵ) =1 for single layer MoS2 (black bold lines) along with RC extracted from experimental devices (red and black symbols). We notice that the fundamental (intrinsic) contact resistance for 1L MoS2 is smaller than 10 Ω·μm at the carrier density of 10 13 cm -2 and reduces further for higher carrier densities.
In our experiments, RC decreases with the carrier density as seen by the blue curve.
Doping the channel with sub-stoichiometric AlOx helps us to achieve even higher carrier density as seen by the red symbols in Fig. 6b [29]. We could experimentally achieve the lowest contact resistance of ~480 Ω·μm at a carrier density of 2×10 13 cm -2 . This contact resistance is still ~300x away from the fundamental limit. This carrier density is limited by the maximum electric field that can be achieved using our gate oxides, which is thermally grown SiO2. It is worth noting that the charge density induced by doping (doped device) as well as a back-gate electric field (undoped device) have a similar impact on the RC. By doing an extrapolation on the experimental RC, we see that we can potentially achieve a contact resistance of 100 Ω·μm at a very high carrier density of 10 14 cm -2 . Though such carrier density has been achieved by using ionic gel gates [30], so far, no CMOS-compatible doping technique has been able to achieve such high carrier densities. Even if it is possible to have such a high doping, we must be able to selectively dope the contacts without "spilling" over the doping to the channel and changing the channel threshold voltage. We, therefore, need to explore other avenues to achieve low RC especially at carrier densities of 10 13 cm -2 or below.
We use the experimental data to fit our transmission matrix model. The black bold curve represents an ideal scenario with Tr(ϵ) = 1 while the black dotted curve represents realistic transmission calculated using TMM and shown in Fig. 5c. For our device, we achieved a fit using wB = 3 Å, ϕB = 50 meV, LT = 10 nm, Λ= 5 nm, χ = 4.05 eV. Note that, among these parameters, the transmission (and the contact resistance) is most sensitive to wB and ϕB. On the other hand, the transmission is not very sensitive to changes in LT and Λ. Our calculations suggest that to reduce the contact resistance further we need to reduce the wB and ϕB. In other words, in order to reach the fundamental limit of <10 Ω·μm, we need an ohmic contact which is intimate and does not a have vdW gap.

III. Conclusion
In summary, we have studied the electronic contact resistance to 2D materials using a multiscale approach including ab-initio simulations, finite element simulations, Landauer-Büttiker formalism, and compact modeling. We have confirmed our simulations results by fabricating TLM structures. We have shown that the metal-2D interface and not the current crowding is limiting the state-of-the-art contact resistance.
We have analyzed the contact resistance by separating the intrinsic components (ρi) and the extrinsic components (C). From our simulations, we have observed that the current crowding is not significant for extremely thin devices with t2D < 1 nm. We have uncovered the current crowding due to contact geometry (C ∝ LC/t2D), transport anisotropy (C ∝ ρout/ρsemi), and the Schottky barrier (C ∝ √ϕB/t2D). We note that, especially for 1L channels, Schottky depletion will have the largest impact on the contact resistance. However especially for thin channels, t2D < 2 nm, we have shown that the back-gate voltage improves the carrier density below the contact and reduces the current crowding.
To improve the contact resistance and reduce the current crowding, we proposed We performed full band calculations using Landauer-Büttiker formalism for fundamental limits of contact resistance to 2D materials. We have shown that it is possible to achieve a contact resistance of < 10 Ω•μm (at the carrier density of 10 13 cm -2 ) for 2D materials. The state-of-the-art contact resistance is 100 times higher than the fundamental limit. This larger contact resistance is primarily because the transmission at the metal-2D interface is extremely poor (i.e. the contacts have larger wB and ϕB). As such, to achieve further improvement in contact resistance we have shown that it is necessary to focus on improving the metal-2D interface.

IV. Methodology
Seemingly different simulation methodologies are necessary to get a holistic picture especially in the case of novel materials such as 2D materials. For example, ab-initio simulations are necessary to calculate the material properties such as band gap and effective mass required for TCAD simulations. ab-initio simulations also provide a dispersion relationship required by Landauer-Büttiker formalism. The compact model depends on the TCAD simulations fit key parameters and optimize current crowding. In the end, we need controlled experimental results (RC) to compare our simulations with. In addition to understanding the contact resistance for 2D materials, we also hope that this study will serve as a guideline for understanding contact resistances for future technologies. Figure 7 shows a schematic depiction of the inter-dependence of different methodologies used in this study.  Landauer-Büttiker formalism: In the limit of no current crowding (C = 0), the contact resistivity (ρC) is limited by the intrinsic contact resistivity (ρi). The ρi for 2D materials is quantified using the Landauer-Büttiker formalism [25], [32]. As per this formalism, the intrinsic contact resistivity to 2D material in the ballistic limit is given as follows, Here, q is the unit electronic charge, h is Planck's constant, f is the Fermi-Dirac distribution.
Here, the modes are counted along the transport direction in the first Brillion zone. The unit of M2D(ϵ) is μm -1 . Θ(ε) is the dispersion relationship calculated using the DFT simulations. k is the momentum vector. For a 2D system, the M2D(ϵ) is proportional to m ⊥ [25], where m ⊥ is the effective mass along the transverse direction or the direction perpendicular to the transport. So effectively, RC ∝ 1 m ⊥ . Since 2D materials are known to have higher effective masses, they are, therefore, expected to have a lower limit to the RC.

Conformal mapping:
The TCAD simulation is supplemented with a compact model for contact resistance exclusively due to current crowding. An analytical expression is derived in Eq. 5 for the contact resistance (Rconformal) in the limits of ρi = 0 using conformal mapping [33]. Such calculations were previously used to calculate resistance in thin film patterns [33] as well as fringe capacitances between non-parallel surfaces [34]. For these calculations, the device is first defined in a complex plane z = x + iy as shown in Fig. 8a. Using an appropriate transformation function [33], this pattern is transformed into a more familiar pattern of a semiconductor bar and two metal contacts in the w = u + iv plane as shown in Fig. 8b. The primary assumption of this transformation is that the flow lines are uniform and elliptical.
The transformation function (f) can, therefore, be defined as w = f(z). This function transforms the flow lines (current potential lines) from the z-plane to the w-plane. For the ease of visualization, one of the many flow lines is shown by the dashed red line in Fig. 8. In the z-plane the resistance is Rz = 2RC + Rch. Here, Rch in the channel resistance. For the limit, LW → ∞, L → ∞, the contact resistance is calculated as, This is further simplified to obtain an analytical expression for the RConformal or the resistance due to current crowding. LC is the contact length and t2D is the thickness of the semiconducting channel.  Here, ρtop is the top contact resistivity (Ω·μm 2 ), LC is the contact length, LT is the current transfer length, t2D is the semiconductor channel thickness, W is the channel width, ρedge is the edge contact resistivity (Ω·μm 2 ), and Nf is the total number of fingers patterned below the metal contacts.
For the holey contact (Fig. 3b), the current can either enter through the edge contact of the holes or through the top contact. The holes with a diameter of Dh and are equally spaced by Gh. An additional parameter in holey contact architecture is the distance of the holes from the contact edge (Lh). Note that only half of the hole circumference facing the current flow will participate in the conduction. If there are additional arrays of the holes, they will be shadowed by the first row of holes closer to the channel and therefore will not be able to participate in the conduction. The total contact resistance for the holey contact can be divided as a parallel combination of the contact due to holes Rh and top contact Rtop such that RC = Rh || Rtop.
1 coth Here, Nh is the total number of holes etched below the contact and Rsh is the sheet resistivity below the contact.

B. Computational Details
DFT: The total number of modes, M2D(ϵ), as discussed in Section A is calculated from the electronic dispersion relation of the 2D materials in the first Brillion zone using ab initio simulations. These density functional theory simulations are performed using the Vienna Abinitio Simulation Package (VASP) [35]. We use the projected-augmented wave method (PAW) [36] with Perdew-Burke-Ernzerhof (PBE) potentials for structure relaxation and employ hybrid functional HSE06 for accurate calculations of the dispersion relation and band gaps [37]. The van der Waals interactions are considered by the Tkatchenko-Scheffler dispersion correction method which has been previously used for 2D materials [38]. For our simulations, we use an energy tolerance of 10 -6 eV per atom and a force tolerance of 10 -2 eV/Å per atom for atomic relaxations. The simulations are performed with periodic boundary conditions on all three dimensions. In the direction perpendicular to the material surface, a vacuum of 1 nm is used to avoid interaction between neighboring cells. The K-point sampling for simulations is 40×40×1.

TCAD:
The three-dimensional (3D) finite element simulations are performed using Sentaurus Device [39]. For contacts, whenever required, a Schottky barrier is assumed at the metal-2D semiconductor interface. A non-local tunneling model is employed to account for tunneling at the Schottky barriers, which considers the band profile along the entire tunneling path. This is especially required in the case of current crowding calculations where the electric field changes along the tunneling path [40]. The tunneling probability along this path is calculated using Wentzel-Kramer-Brillouin (WKB) approximation. Because of the layered nature of 2D materials, the in-plane mobility is larger than the out-of-the-plane mobility. The material properties of the 2D materials such as band gap (~ 2 eV), and effective mass (0.45m0, m0 is the free electron mass) are calculated for 1L MoS2 using DFT. To keep the analysis simple, these quantities are assumed to be the same for different semiconductor thickness. Even after taking all possible precautions mentioned here, TCAD simulations have their limitations especially because they do not capture the interactions between metal and semiconductor at the interface (for additional discussion please refer to Appendix A).
Nevertheless, these simulations can provide an accurate relationship between device electrostatics, current crowding, and RC, which is one of the main subjects of this paper.

C. Experimental details
For the experimental extraction, we fabricate TLM structures with 1L MoS2 grown by chemical vapor deposition (CVD) [28], [41]. First, the contacts are made using lithography and 40 nm thick Au deposited with electron-beam physical vapor deposition in high vacuum (~10 -8 Torr). The MoS2 is then etched for well-defined widths using O2 plasma and photoresist as an etch-mask. Each TLM structure has multiple devices with varying channel lengths from 100 nm to 2 μm. For one of the TLM structures, we cap the MoS2 channel with sub-stoichiometric aluminum oxide (AlOx) to induce n-type doping in the MoS2 [42]. We use these TLM structures to extract the contact resistance for various back-gate voltages (and the carrier densities). A.

Limitations of TCAD simulations
At the nanoscale, the contact metal interacts with the 2D materials [14]. It has been observed that the 2D material below the contact is significantly affected due to the interaction with the metal [20]. The metal could induce metallic states in the semiconductor and make the 2D material at the interface completely metallic and no band gap [19]. As a result, especially for few layers of 2D materials, the potential seen by the carrier at the interface is not accurate in Sentatarus TCAD. If such subtleties are not considered, it might lead to incorrect conclusions about carrier injection [13]. In experiments, there are additional factors such as surface impurities, metal contact grains which would further affect the carrier injection.

B. Impact of semiconductor traps and band states on current injection
In Fig. 9a, we show an energy band structure below the contact after applying a certain back-gate voltage. Especially for very thin semiconductors, the conduction band may not bend sufficiently to have empty states for electrons from the metal to tunnel too as shown in Fig. 9a. As such the tunneling path for carriers shown by the red dotted arrow in Fig. 9a is forbidden. In other words, the carriers cannot be injected from the top contact, and the only possible path for carrier injection is through the contact edge. In realistic devices with semiconductor traps or metal induced gap states [20], the semiconductor below the contacts will have band gap states. We show in Fig. 9a (green arrow), that in the presence of such trap states we can still inject the carriers in the semiconductor from the top contact. Note that even though we did not consider traps for our previous simulations, our conclusions for Fig.   1 and 2 still hold because in all these cases ρC and as a result LT are very small.
We show in Fig, 9b the contact resistance for three different cases as a function of channel thickness. The contact resistance for thermionic only case (brown diamond symbols) is highest, while the contact resistance when we allow tunneling is lowest (ρC is low, blue square symbols). Adding trap (green square symbols) increases the contact resistance slightly due to a slight degradation in Rsh. In Fig. 9c-e, we show the current density below the contact for these three cases. As expected in Fig. 9c-d, the highest current density is observed close to the oxide-semiconductor interface and larger carrier injection seems to happen close to the edge. While in Fig. 9e, where we include traps in the semiconductor, we see that the larger carrier density is seen closer to the contact and the carrier injection is uniform throughout the contact length. In summary, in realistic semiconductors, it is more likely for the carriers to undergo top injection even for extremely thin channels.

Acknowledgments
This work has been partly supported by the NCN-NEEDS program, which is funded by the NSF contract 1227020-EEC and by the Semiconductor Research Corporation (SRC).
The study was also partly supported by the NSF EFRI 2-  We have shown the current densities below the contact for (c) Schottky contact but all transport is thermionic as the non-local tunneling model (NLM) is switched off, (d) Schottky contact with NLM (tunneling) switched-on, and (e) Schottky contact with NLM (tunneling) and semiconductor traps. For these simulations, we have assumed tBOX = 5 nm and VGS = 5 V. We assume a n-type doping density of ND = 10 19 cm -3 , ϕB = 20 meV, in-plane mobility of 50 cm 2 V -1 s -1 , anisotropy of 10, t2D = 2 nm, and LC 50 nm.