{'fraction_non_alphanumeric': 0.02181818181818182, 'fraction_numerical': 0.0018181818181818182, 'mean_word_length': 5.291428571428572, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Optimizing Halide for Digital Signal Processors

Halide, a Domain Specific Language (DSL) for image and array processing, promotes the separation of functional algorithm from execution schedule, making it easier for the user to optimize the code for different hardware platforms. Halide supports multiple back-end APIs, including CUDA and OpenCL for GPUs. Although many modern Digital Signal Processors (DSPs) support OpenCL, achieving high performance on these devices require the use of features beyond those required to support GPUs. Without those features, there is a strict limit to the effectiveness of targeting a DSP through the Halide OpenCL back-end. In this paper, we describe a set of Halide extensions and optimizations required to effectively support a DSP target, including DMA Promotion, Type Width Reduction and Intrinsic generation. We evaluate the effects of our optimization on Cadence Vision DSP and report the results. On an average, we observe 88X speedup over the baseline generated OpenCL code, and the performance is comparable to handcrafted OpenCL for the target platform.