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Implementation of a VME bus to internal bus bridge FPGA core

Since several years ago a wide variety of FPGA-based cores have been appearing all round. This is fruit of the versatility of these devices due basically to the amount of system gates that can implement. Many of the cores are in the market as IP (Intellectual Property) but many others implemented by an engineering team when developing a platform never come out. In this paper we present an FPGA core implementing the required bridging between the standard VME bus and a defined internal bus. This core, while using relatively few resources, has a high level of performance and supports most of functions defined in the standard. This core, when inserted into a system will significantly reduce the complexity of interfacing a complete VME backplane because it can map the elemental behavior of the internal bus to the multiple VME accesses.