{'fraction_non_alphanumeric': 0.0195578231292517, 'fraction_numerical': 0.0008503401360544217, 'mean_word_length': 5.467032967032967, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Characterization algorithm of failure distribution for lsi yield improvement

This paper describes about an algorithm, which can efficiently characterize a process-induced random failure distribution and a design-induced systematic failure distribution from unknown-induced failure distributions of a memory LSI to predict a reason for yield degradation in it. Our developed algorithm analyzes a function "T(f) isn't greater than 1 or not" related kind and the content of the mathematics measure "f" comes from a histogram of all pair of failure distances to distinguish between a random distribution and a systematic distribution. The cause specification using this algorithm is based on the fact that process induced failure caused by particles or contamination results in a random distribution and design-induced failures have some kind of distribution shape or period depending on circuit layout. Memory LSI failure analysis with our algorithm is able to distinguish between an almost random (process-induced) distribution in one direction, and a systematic (design induced) distribution in the other. This algorithm is effective for a device containing an array of cells.