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Using the theory of constraints' production application in a semiconductor fab with a reentrant bottleneck

In early 1995, Harris Semiconductor's Findlay plant embarked on the process of developing the theory of constraints (TOC) drum-buffer-rope (DBR) production application in our wafer fabs, using a reentrant bottleneck, in which the product passes through the bottleneck multiple times. We formed a lead team to customize the generic production application to our unique situation and learned much about how to apply each of the components of DBR to a reentrant bottleneck situation. For example, to determine how many wafers to start each week, we determine the total bottleneck moves for the previous week, divide by the average number of bottleneck repetitions per wafer, and adjust for yield. For the past three years, the plant has been using this system, and it has evolved greatly. During that time, the bottleneck has changed several times, though we chose to maintain the formal bottleneck throughout this time. In addition, we have gone through several periods where the constraint shifted to the market, in which capacity outstripped demand. Using five focusing steps, we doubled bottleneck capacity in the focus fab over this time. Activities around the improvement included decoupling the bottleneck operation from a nonbottleneck operation, modifying operator shifts and work rules, improving capability at the bottleneck through various improvement projects, and using critical ratio to schedule all nonbottleneck operations.