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Enhanced Electrostatics for Low-Voltage Operations in Nanocrystal Based Nanotube/Nanowire Memories

The metal nanocrystal (NC)/carbon nanotube (CNT) based nonvolatile memory has been proposed recently in comparison to the microfabricated Si channel and Si NCs in ultranarrow channel structure. The electrostatics of metal NC-CNT devices during memory operations differ significantly from the metal NC memory with planar silicon channel. In this paper, we present the theoretical analysis on the three-dimensional (3-D) electrostatics of the NC-CNT device during memory operations, to illustrate the experimentally observed large number of charge storage at low gate bias (5 V) despite a 100-nm-thick bottom-gate control dielectric. NCs are electrostatically more strongly coupled to the two-dimensional (2-D) gate electrode than to the one-dimensional (1-D) channel, even when the NCs are in much closer proximity to the 1-D channel, for efficient tunneling and low-voltage program operation. Under the retention condition, the NC-CNT devices have lower electric field across tunneling oxide than that in the case of a 2-D channel. This increasing electric field difference with respect to program versus retention operations indicates larger ratio between program and retention times. Together with the large number of electrons stored per NC, this enhanced electrostatics can be utilized either to reduce the operating voltage or to reduce statistical fluctuation of the information storage