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Electrically inert h-BN/bilayer graphene interface in all-2D-heterostructure FETs

Bilayer graphene field-effect transistors (BLG-FETs), unlike conventional semiconductors, are greatly sensitive to potential fluctuations due to the charged impurities in high-k gate stacks since the potential difference between two layers induced by the external perpendicular electrical filed is the physical origin behind the band gap opening. The assembly of BLG with layered h-BN insulators into van der Waals heterostructure has been widely recognized to achieve the superior electrical transport properties. However, the carrier response properties at the h-BN/BLG heterointerface, which control the device performance, have not yet been revealed due to the inevitably large parasitic capacitance. In this study, the significant reduction of potential fluctuations to ~1 meV is achieved in all-2-dimensional heterostructure BLG-FET on a quartz substrate, which results in the suppression of the off-current to the measurement limit at a small band gap of ~90 meV at 20 K. By capacitance measurement, we demonstrate that the electron trap/detrap response at such heterointerface is suppressed to undetectable level in the measurement frequency range. The electrically inert van der Waals heterointerface paves the way for the realization of future BLG electronics applications.


INTRODUCTION
The main factors that limit carrier modulation in metal-oxide-semiconductor field effect transistors (MOSFETs) are interface traps and potential fluctuations due to fixed charges in oxide insulators. 1 In conventional semiconductors such as Si, SiC and other compound semiconductors, the intrinsic band gap of the channel materials is sufficiently large compared to the potential fluctuation of 30~120 meV; 2-5 therefore, the main strategy to improve the device performance has been the reduction of the interface trap density (Dit).
On the other hand, bilayer graphene (BLG), a promising high-mobility channel, possesses an electrostatically tunable but relatively small band gap (Eg) up to ~0.3 eV attained by applying a displacement field (D ̅ ). 6,7 The displacement field induces different carrier densities in the top and bottom layers of BLG, resulting in potential difference between the two layers. This inversion symmetry breaking is the physical origin behind the band gap opening. 8 Therefore, the conventional high-k oxide/BLG gate stack on a SiO2/Si substrate, which introduces charge inhomogeneity with potential fluctuations of 20~30 meV, 9,10 has suffered from high off-current (Ioff) due to the spatial variation of the band gap in the channel, which leads to a low on/off current ratio (Ion/Ioff). [11][12][13][14][15][16][17][18][19][20] Moreover, contrary to the transport measurement, the capacitance-voltage (C-V) measurement is often used to measure the mobile carrier response to a small-signal alternating current voltage at a certain frequency to elucidate the interface properties. Since the charge inhomogeneity in the oxide gate stack introduces the disorder in the gap, the gap state density has been estimated to be ~10 13 cm -2 eV -1 by conductance method in high quality high-k Y2O3 top gate insulators, 19 which has a value that is two orders higher than that in SiO2/Si system. Therefore, the predominant issue for BLG is to reduce the charged impurities, unlike conventional semiconductor systems.
Since h-BN was first recognized as a substrate for achieving high carrier mobility in graphene due to reduced charged impurities and atomically flat surface, 21 there have been many reports on the improved transport properties for BLG/h-BN heterostructures on SiO2/Si wafers. [22][23][24][25][26][27][28][29][30][31][32][33][34] Because of the high mobility and reduced disorder obtained, topological issues have recently been intensively investigated through the electrical transport properties, [35][36][37] and topological edge currents were proposed as an alternative origin, rather than gap states to explain why Ioff often saturates around low D ̅ (~0.2-0.3 V/nm) even in the h-BN-encapsulated BLG. Indeed, the edge current was reported in h-BN-encapsulated BLG on a SiO2/Si wafer with the Hall bar geometry, while no conduction path was found in the edgeless Corbino geometry. 36 However, it is still under debate because the zigzag edge structure expected for the edge current is generally difficult to form and the contribution of remnant charged impurities is still suggested. Here, in order to screen the charged impurities on the SiO2/Si substrate, the h-BN substrate itself is not enough because the global back gate propagates the charge inhomogeneity in oxides through h-BN to BLG, which may lead to non-ideal suppression of Ioff. Therefore, graphite back gate electrodes have often been used recently. 36,[38][39][40][41] Despite the common understanding of the superior electrical transport properties of h-BNencapsulated BLG, the carrier response properties at the h-BN/BLG heterointerface, which control the device performance, have not yet been revealed due to the inevitably large parasitic capacitance (CPara) from the high-doped Si substrate as the global back gate. In this study, the charged impurities and CPara are reduced to the limit by using graphite as both back and top gate electrodes for h-BN-encapsulated BLG on a high insulating quartz substrate. Using this all-2-dimensional (2D) heterostructure BLG-FET on a quartz substrate, we demonstrate the significant reduction of potential fluctuations to ~1 meV, which results in the suppression of the off current to the measurement limit at a small band gap of ~90 meV at 20 K. The frequency-dependent C-V measurements revealed no carrier response in the measurement range up to 2 MHz, suggesting that the h-BN/BLG heterointerface in all-2D structures is electrically quite inert.
All-2D heterostructures were fabricated by a method similar to previously reported pick up method using polymers of polydimethylsiloxane (PDMS) and polymethylmethacrylate (PMMA). [42][43][44] Detailed procedure can be seen in Note 1. Using a micromanipulator system, 44 van der Waals heterostructure composed of h-BN top gate, BLG, h-BN back gate and graphite back gate electrode were fabricated onto a quartz substrate. To obtain a clean BLG/h-BN interface, bubbles containing air and hydrocarbons must be removed. However, once BLG is encapsulated by h-BN crystals, interfacial bubbles did not aggregate with the subsequent annealing, unlike BLG on h-BN. 44 The selection of BLG with a width narrower than 2 m resulted in fewer bubbles being trapped in BLG channel area during encapsulation, as shown in Fig. S2. Moreover, it was observed that bubbles formed near the edge of the BLG flake encapsulated by h-BN crystals often migrate out of the BLG flake after annealing, making it possible to obtain a larger clean interface area in narrow BLG for further device fabrication.
Because BLG is completely encapsulated in h-BN, electrical contacts cannot be directly formed on BLG. In previous studies, the contact region was entirely etched by CHF3/O2 plasma with 60 W power in a tilted profile to form edge contact with metal electrodes. 42 In this study, it was found that h-BN can be selectively etched by CF4 plasma when the power is reduced to 18 W. The high selectivity of 1:100 for BLG and h-BN is due to the chemical reaction being more dominant than physical etching in low power plasma. The detailed electrode formation process is shown in Fig. S3. It should be emphasized that the yield for ohmic contacts is greater than 80 % because of the surface contact.
Metal top gate electrodes have been conventionally used in BLG devices so far. However, electron back scatter diffraction pattern (EBSD) analysis revealed that the Ni/Au top gate metal electrode was tiny polycrystalline, leading to an increase in the potential fluctuation in BLG due to the variation of the work function for different crystal orientations, as shown in Fig. S4. Therefore, to minimize the potential fluctuations in BLG, graphite was also used as the top gate electrode for h-BN-encapsulated BLG, 45 creating all-2D heterostructure, as shown in Fig. 1. The cross sectional transmission electron microscope (TEM) image ( Fig. 1(c)) indicates that the interface between h-BN and BLG is clean and atomically sharp with a surface roughness (RMS) of <0.1 nm, which is confirmed by an atomic force microscope (AFM).

Drastic improvement of Ion/Ioff.
To evaluate Ion/Ioff for all-2D heterostructure BLG-FET, two terminal conductivity was measured as a function of VTG for each VBG at 20 K, as shown in Fig. 2(a). A quite sharp ambipolar behavior was observed. As shown in the enlarged figure, Ioff was suppressed to the measurement limit at D ̅ < -1.34 V/nm, where the resistance was larger than ~5 G. This is quite similar with the recent report 46 and exceeds previously reported values of ~10-100 k. [14][15][16]19 Ioff in all-2D heterostructure BLG was reduced compared to h-BN-encapsulated BLG on SiO2/Si as well as high-k Y2O3/BLG on SiO2/Si at the same |D ̅ | , as shown in Fig. 2(b), indicating drastic reduction of the charged impurities and hence the spatial uniformity of the band gap of BLG. As a result, Ion/Ioff is greatly increased compared to other devices at the same |D ̅ | , and the maximum Ion/Ioff at 20 K was 4.6×10 5 at D ̅ = -1.48 V/nm, which is the best data thus far for h-BNencapsulated BLG-FETs. Another important advantage of using graphite as back gate electrode is that the maximum D ̅ attained is increased due to the utilization of thin h-BN compared to that in the n + -Si global back gate, because the total 2D crystal thickness of ~20 nm required to eliminate the SiO2  [7] BN/BLG/BN (DFT) [50]  surface roughness can be mainly covered by the graphite back gate. The field effect mobility was estimated to be ~20000 cm 2 /Vs at 20 K. The subthreshold swing was 40 mV/dec at 20 K, suggesting the improvement in interface properties. The transfer characteristics with forward and backward top gate voltage sweeps at 20 K are shown in Fig. S5. The hysteresis is negligible and the device shows exactly the same performance and charge neutrality point even at 1 year after the fabrication. 47 Minor peaks observed near the Dirac point for each back gate voltage at lower temperature might be formed by moire potential from h-BN. 24 The temperature dependence of the conductivity at the Dirac point (σ@DP) shows two activation processes in measured temperature range, as shown in Fig. 2(c). They are known as thermal activation (TA) at high temperature and nearest neighbor hopping (NNH) at low temperature. 15,16,19 The conductivity at the Dirac point is given by where TA 0 and NNH 0 are prefactors and E0 is the hopping energy. Because all the conductivity data are well fitted, Eg and E0 are extracted and plotted as a function of D ̅ in Fig. 2(d). The maximum band gap extracted from the temperature dependence in the all-2D heterostructure was ~90 meV at D ̅ = -1.34 V/nm, which is limited due to the small dielectric constant of h-BN and the dielectric breakdown field of ~1.5 V/nm for the thickness used in this experiment. 48 The measured Eg was smaller than the value obtained from tight-binding calculations 7 and density functional theory 49 for BLG in vacuum. However, there has been a report predicting that the band gap opened at the same D ̅ in BLG encapsulated by h-BN will be smaller than that in BLG in vacuum due to the screening of the electrical field by h-BN. 50 Due to NNH occurring by carrier hopping between localized states in the band gap, E0 can be used as a measure for the amount of localized states in the band gap; i.e., the larger E0 is, the smaller the amount of localized states in the band gap. In the all-2D heterostructure BLG device, E0 was extracted to be 14 meV at the maximum D ̅ = -1.34 V/nm, as shown in the inset of Fig. 2(d). This is much larger than E0 = 2.8 meV at a larger value of D ̅ = -3.1 V/nm in the high-k Y2O3/BLG device, 19 supporting that there are fewer impurity-induced localized states in the band gap.

Carrier response in energy gap and DOS determination.
The drastic reduction of charged impurities expected from the large Ion/Ioff also suggests the reduction of the mobile carrier response at gap states, which will be revealed here. To measure the capacitance of the limited active channel area in the all-2D heterostructure, it is critical to reduce parasitic capacitance (CPara). In this experiment, the total capacitance between the top gate and source/drain was measured, therefore the observed CPara is that between the top gate and source/drain electrodes. The detailed information on the C-V measurement is described in Note 2. When devices were fabricated on n + -Si wafer, a large frequency dependence in CPara was observed because of SiO2 behaving as a capacitor between the metal electrode pad and the n + -Si wafer, as shown in Fig. S7. On the other hand, when devices were fabricated on a quartz substrate, the frequency dependence in CPara disappeared, resulting in negligible CPara. Therefore, all the data shown below are obtained from the all-2D heterostructure BLG on a quartz substrate.
The total capacitance (CTotal) between the top gate and source was measured at a frequency of 1 MHz by sweeping VTG at each fixed VBG in vacuum at 20 K, as shown in Fig. 3(a). Constant D ̅ lines, which indicate the constant band structure, are depicted by black dotted lines. CTotal is composed of the top gate capacitance (CTG) and the quantum capacitance (CQ) of BLG and CPara, as shown by the simplified equivalent circuit in Fig. 3(b). CQ is regarded as the energy cost of inducing carriers in BLG and is directly given as CQ = q 2 DOS, where q and DOS are the elementary charge and the density of states, respectively. 51 When the band gap is formed, CQ at the Dirac point decreases due to the drastic reduction of DOS, resulting in the reduction of CTotal. First, the capture and emission process of mobile carriers at gap states is discussed based on the frequency dependence of CTotal. The frequency dependence of CTotal measured along the constant D ̅ = -1.25 V/nm in a different device is shown in Fig.  3(c, d). No frequency dependence of CTotal was observed in the frequency range of 10 kHz to 2 MHz. Even by the conductance method, 1 in which the capture and emission of mobile carriers by trap levels in the band gap can be detected as a deviation from the ideal carrier response, no detectable deviation from the ideal response was found, suggesting a negligible Dit in the present frequency range. On the other hand, for all-2D heterostructure devices with bubbles in the BLG channel, a frequency dependence in CTotal was clearly observed, as shown in Fig. S8. Moreover, in parallel conductance extracted from the equivalent circuit, the left shoulder of conductance peaks was observed in the high frequency region as shown in Fig. S8(e), suggesting that the time constant is faster than the measurable range in this experiment. This is probably due to the present band gap opened 5 using h-BN as insulators being small compared to the maximum band gap of ~300 meV in high-k Y2O3/BLG device. 19 The clear observation of the carrier response in devices with bubbles in the BLG channel validates the interpretation of the absence of a frequency response in Fig. 3(c, d).
Next, the DOS of BLG in all-2D heterostructure device was derived from CQ extracted from the measurement. Because of the negligible Dit, the contribution of interface trap capacitance (Cit) to CTotal can be neglected. Therefore, by taking the high frequency limit, CQ is expressed as the simplified equivalent circuit in Fig.  3(b). CTG was estimated to be 0.287 μF/cm 2 using the dielectric constant of 4 for h-BN with a thickness of 12.3 nm measured by AFM, which is roughly consistent with the h-BN capacitance at a different top gate position shown by a red arrow in Fig. 1(b). Then, CQ was extracted at each D ̅ as a function of Fermi energy (EF) by measuring CTotal along the constant D ̅ using CPara as a fitting parameter, as shown in Fig. 4(a). Although devices fabricated on a quartz substrate usually shows extremely small CPara as shown in Fig. S7, CPara = 0.003361 μF/cm 2 , which is equivalent to a capacitance of 1 fF measured in the top gate area of 29.75 μm 2 , was used to produce better fits. The extracted CQ at D ̅ = 0 V/nm fits reasonably well with the theoretical value for bilayer graphene calculated by the tight-binding model. 52 EF was calculated by the same method as in previously reported measurement. 19 EF is expressed as EF =   VCN, where VCN is the charge neutrality voltage for each VTG, and CTotal' = CTotal -CPara, respectively. As D ̅ is increased, CQ at the Dirac point decreases due to band gap opening in BLG. In gapped BLG, van Hove singularities (vHS) are clearly observed at gap edges. Increasing disorder, such as charged impurities, results in more smearing of vHS and more disorder-induced states in the band gap, leading to gap closing at small D ̅ . 19,53,54 The measured result shows two sharp vHS at both gap edges and a well-defined gap, indicating that the disorder strength is considerably reduced compared to the previous experiments on h-BN/BLG on SiO2/Si and high-k Y2O3/BLG on SiO2/Si devices where only one pronounced vHS was observed. 19,54 The vHS observed were asymmetrical, which can be explained by the near-layer capacitance enhancement effect. 55 Here, the CQ at the Dirac point (CQ@DP) can be used as a measure of the amount of disorder-induced states in the band gap. The CQ@DP values for both all-2D heterostructure and high-k Y2O3/BLG devices are shown in Fig. 4(b). The result shows that in the all-2D heterostructure device, CQ@DP decreases rapidly even at small D ̅ and almost reaches zero compared to that in the high-k Y2O3/BLG device, 19 supporting that disorder was reduced in the all-2D heterostructure. The other study also found that the graphite top gate could further improve the resolution on the integer quantum Hall states. 45 Since vHS are clearly observed, the size of the band gap opened at each D ̅ was evaluated by defining the band gap size as the energy difference between vHS at both sides. As shown in Fig. 2(d), the measured results from C-V and I-V in all-2D heterostructure devices are consistent even at low D ̅ . To investigate the behavior of disorderinduced states in the band gap, the temperature dependence of CQ in the band gap of the all-2D heterostructure was observed using a different device as in Fig. 4(a). Fig. 4(c) shows CQ as a function of EF measured at D ̅ = 1 V/nm at each temperature. At finite temperature, the CQ of a 2D material is given by where 2D = s v * /2 ℏ 2 is the band-edge DOS, which was chosen from the experimental value, and kB is the Boltzmann constant. 56 gs and gv are the spin and valley degeneracy factors, respectively, and m * is the effective mass. This results in the temperature dependence of CQ in the band gap. CQ@DP is plotted as a function of temperature in Fig. 4(d). Only the data in the high temperature range could be fitted by eq. (2). The temperature dependence of CQ@DP measured suggests a different mechanism at the low temperature range. The transition in the dominant mechanism in CQ@DP seemed to be in the same temperature range as σ@DP. It was found that adding the NNH term using 0 measured at the same D ̅ to eq. (1) resulted in all the calculated values being fitting with the measured data well at all temperatures, as shown in Fig. 4(d). This indicates that although there was no frequency response of capacitance in the band gap, quite a small amount of disorder-induced states still exists in the band gap. It may be possible that these remnant gap states have a time constant even faster than those observed in Fig. S8(e) because the maximum band gap opened is small.

Quantitative estimation of the potential fluctuation
The reduction of charged impurities has been qualitatively demonstrated from both the I-V and C-V analyses. Here, let us extract the potential fluctuation due to charged impurities in the energy unit quantitatively. Ideally, Eg should be zero at D ̅ = 0 V/nm, but in experiments, finite Eg at D ̅ ~ 0 V/nm has been observed in previous studies because the potential fluctuation prevents the gap from closing locally. Therefore, remnant Eg/2 value at D ̅ ~ 0 V/nm is associated with the root-meansquare amplitude of the potential fluctuation (rms) in BLG. 15 Figure 5(a) compares Eg/2 as a function of D ̅ for the all-2D heterostructure and high-k Y2O3/BLG device. In our previous high-k Y2O3/BLG device, 19 rms was estimated to be 26 meV which is in agreement with the previous literature data on other high-k/BLG cases. 15 A significantly smaller value of rms = ~0.5 meV was observed in several all-2D heterostructure devices fabricated in this study. The carrier density equivalent to this potential fluctuation was estimated to be 1.3×10 10 cm -2 by the relation of = rms (2 * / ℏ 2 ), where a constant 2D DOS for small energy deviation of EF is assumed for simplicity. It should be emphasized that BLG is most sensitive to the potential fluctuation because the carrier density difference between the top and bottom graphene layers results in band gap opening, suggesting that the utilization of all-2D heterostructure is critical. Moreover, although the observed potential fluctuation in the all-2D heterostructure seems to be comparable to those extracted from recently reported high-quality h-BN- SiO 2 /Si [2] SiO 2 /SiC [5] SiO 2 /GaN [3] SiO 2 /IGZO [4] 1/10

Due to oxide
High-k/BLG [19]  encapsulated BLG on SiO2/Si 34,36 or on the metal electrode, 57 the difference between with and without the graphite back gate electrode becomes more obvious in the Ion/Ioff data in Fig. 2(b). This indicates that the role of the graphite back and top gate electrodes is to apply uniform D ̅ as well as to screen charged impurities in SiO2. respectively. The effect of the potential fluctuation due to amorphous oxide insulators is more prominent in small-gap semiconductors and topological insulators. 58 Therefore, the van der Waals layered heterostructure is quite promising to study the physical properties with the small energy (a few meV).

DISCUSSION
To realize BLG-FETs, that is, to achieve sufficient Ion/Ioff at room temperature, it is necessary to open the maximum band gap of ~0.3 eV while retaining the present BLG/h-BN interface quality. This requires applying |D ̅ | ≥ 3 V/nm, which is not attainable only with h-BN as insulators due to its small dielectric constant of ~4. Although the combination of high-k amorphous oxide and h-BN provides |D ̅ | ≥ 3 V/nm, the potential fluctuation due to charged impurities in high-k amorphous oxide will deteriorate Ion/Ioff. To apply |D ̅ | ≥ 3 V/nm, the gate stack structure needs to be reconsidered, such as by combining h-BN with high-k single-crystal nanosheets, 59,60 in which potential fluctuation might be reduced due to crystal periodicity.
Finally, let us discuss the resistivity saturation at DP with increasing D ̅ observed often in the previous literatures. 36,61 Two different origins are proposed. One is the topological current along the AB-BA domain boundary in gapped BLG and the resistivity saturation has been observed at around D ̅ ~1 V/nm. 61 In this study, such behavior was not observed as the resistivity continued to decrease up to D ̅ = -1.48 V/nm. This D ̅ value is one of the best values for h-BN encapsulated BLG so far and is sufficient to discuss the conductivity saturation. Therefore, it is suggested that there was no contribution of the current along the AB-BA domain boundary. The other origin is the topological edge current in gapped BLG, as mentioned in Introduction. The device with the edgeless-Corbino geometry showed no resistivity saturation within the maximum D ̅ value of ~0.6 V/nm, while the resistivity of the device with the Hall bar geometry saturated at around D ̅ = ~0.2 V/nm. 36 This contradicts the present study. In general, the edge current requires the zigzag edge structure, and the channel length should be shorter than the localization length. In this study, the channel length of ~20 m could be much longer than the localization length, resulting in the high Ion/Ioff. However, for a short channel, the edge structure should also be controlled to prevent the topological edge current.

CONCLUSIONS
We have demonstrated significantly improved device properties in all-2D heterostructure BLG-FETs on quartz compared to h-BN-encapsulated BLG on SiO2/Si as well as high-k Y2O3/BLG on SiO2. For the transfer characteristics at 20 K, Ion/Ioff reached 4.6×10 5 with the off-state resistivity of ~5G and the field effect mobility was 20000 cm 2 /Vs. For the h-BN/BLG interface quality, the non-detectable amount of Dit and two sharp vHS suggests that the 2D heterointerface is electrically inert. These significant results are mainly attributed to the drastic reduction of the potential fluctuation to ~1 meV and hence the spatial uniformity of EG. This quite low potential fluctuation can be achieved only in all-2D heterostructure BLG-FETs, not in conventional semiconductor systems with high-k gate stacks. Therefore, the all-2D heterosturcture BLG-FET is promising for future electronics applications.

SUPPORTING INFORMATION
Raman spectra of BLG, bubble free transfer, electrode formation to encapsulated heterostructure, EBSD analysis on top gate metal electrode, contribution of Parasitic capacitance to the total capacitance, and Frequency dispersion for the heterostructure with bubbles. The Supporting Information is available free of charge via the Internet at http://pubs.acs.org.

AUTHOR INFORMATION
Corresponding Author *Email: nagashio@material.t.u-tokyo.ac.jp Notes The authors declare no competing financial interests.

Note 1. Details of device fabrication
All-2D heterostructures were fabricated by a method similar to previously reported pick up method using polymers of polydimethylsiloxane (PDMS) and polymethylmethacrylate (PMMA). BLG, h-BN and graphite were mechanically exfoliated onto each SiO2 (90 nm)/n + -Si wafer, while h-BN for the top gate insulator and graphite for the top gate electrode were separately exfoliated onto PMMA/PDMS/glass slide substrates whose surfaces were treated by oxygen plasma. Using a micromanipulator system, h-BN top gate and BLG were aligned and then heated to ~100℃ for 5 minutes to remove adsorbed water on their surfaces. Afterwards, the substrates were brought into contact while being heated to ~55℃ to facilitate adhesion between the crystals. Because the van der Waals force between 2D crystals is greater than that between a 2D crystal and SiO2, a 2D crystal on SiO2 can be

Note 2. Details of C-V measurement
Lakeshore low temperature prober CRX-6.5K with closed-cycle cryostat system and Keysight E4980A LCR meter were used to measure the capacitance in this study. Generally, the parasitics of the prober system is removed by using the cable connection shown in Fig. S6. However, this cable connection increased the noise level because of the vibration from the mechanical refrigerator. Therefore, in this study, the parasitics were removed by performing open and short corrections before measuring the samples (the electrical correction), resulting in the noise floor of ~ 2 fF. However, the capacitance value that we measure is the order of several 10 fF due to the limited are of top gate in the heterostructure, even though h-BN is thin. In this case, the contribution from the metal electrode pad is quite large because of the large area. Therefore, the limiting factor is the residue frequency-dependent parasitics from the sample, not from the measurement system. These issues are critical for investigating the interface trap density by the conductance method, as frequency dependence resulted from the substrate is included in frequency dependence resulted from the interface traps. Therefore, the quartz substrate was used to eliminate these problems.

Figure S6
Schematic representation of cable connection for removing parasitics in C-V measurement performed in this study.  In case of all-2D heterostructure BLG device on quartz, CPara is more than an order of magnitude smaller than CTG, indicating CPara is negligible.   . The peaks of Gp/ω seem to be in the frequency range higher than measurement limit in this study, suggesting that it is shorter than measurement limit in this study, therefore Dit could not be extracted quantitatively. However, the present result shows the response of Cit which is consistent to the frequency response of Ctotal, supporting the interpretation of the data in Fig. 3(c, d).