{'fraction_non_alphanumeric': 0.01763668430335097, 'fraction_numerical': 0.015873015873015872, 'mean_word_length': 5.005291005291006, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
A New IIP2 Enhancement Technique for CMOS Down-Converter Mixers

The design of a CMOS mixer for cellular phone and 3G applications is challenging because of tough linearity and noise requirements. A new technique for second-order input intercept point (IIP2) enhancement of CMOS down-converter mixers is introduced in this brief. The technique is based on canceling second-order intermodulation components generated in input pseudodifferential transconductor, by injecting a nonlinear current to the mixer. Since this current is controlled by a high bandwidth feedback loop, the cancellation technique can be used in multistandard mixers for high channel bandwidth applications like UMTS and IEEE802.11 as well as GSM. A CMOS mixer demonstrating the performance for UMTS standard is designed in a 65-nm technology which can work with supplies as low as 1 V. The simulation results show that the differential and common mode IIP2 of the mixer are improved about 22 and 29 dB, respectively, while cancellation circuit consumes less than 3.3 mA. The other mixer parameters such as noise figure are not affected by the proposed technique.