{'fraction_non_alphanumeric': 0.01293103448275862, 'fraction_numerical': 0.0, 'mean_word_length': 5.223214285714286, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
A Petri net approach to the design of processor array architectures

In this paper, a methodology for deriving processor array architectures that meet desired specifications for nested-loop algorithms is introduced. The methodology is based upon the construction of a Petri net model for the dependencies of the algorithm, the development of a forest of reachability trees for this model and the creation of an execution graph. Different executions of the algorithm are found on the reachability tree forest through a proposed function, leading to different architectures that implement the algorithm. The main advantage of this method is that it may easily lead to non-homogeneous architectures.