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Electronic circuit model for evaluating S-kink distorted current-voltage curves

So-called S-kink current vs. voltage (J-V) curves have been reported for solar cells based on numerous different materials and architectures, including but not limited to devices based on organic materials, chalcogenides including CIGS and CdTe, and passivated c-Si heterojunction devices. Reports frequently attribute the behavior to the presence of non-ideal energy offsets at one or both contacts. We report a method for modeling S-Kink behavior through the use of a modified diode circuit design for which an anti-parallel diode pair, in series with the main p-n heterojunction diode, serves to limit the current flow at voltage bias values near VOC. The model provides a means to extract diode parameters from J-V plots exhibiting S-Kink behavior.