{'fraction_non_alphanumeric': 0.026470588235294117, 'fraction_numerical': 0.0, 'mean_word_length': 5.450236966824645, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
A New Surface Potential Based Compact Model for Independent Dual Gate a-IGZO TFT: Experimental Verification and Circuit Demonstration

For the first time, we proposed a continuous analytical surface potential-based compact model of the independent Dual Gate amorphous In-Ga-Zn-O thin film transistors (IDG a-IGZO TFTs), where percolation conduction, trap-limited conduction (TLC) and variable rang hopping (VRH) transport theories in the extended and localized states are both considered via Schroder method, physically describing the transport mechanism under different conditions of temperature and carrier density. Moreover, a single formulation of front and back surface potentials that is valid and extremely accurate in all operation regimes is developed. Based on the transport theories and surface potential, complete compact model dedicated to IDG TFTs is presented. Furthermore, the threshold compensation effect is also included in this model. To calibrate the model, we fabricated asymmetric dual gate a-IGZO TFTs. The model is validated by an excellent agreement with numerical solutions and experimental results. Finally, the compact model is coded in Verilog-A, and implemented in a vendor CAD environment. A systemically simulation of both ring oscillator (RO) and pixel circuit proves the potential application of this model in circuit design.