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Minimum Switching Loss SVPWM Algorithm for Cascaded H-Bridge Three-Level Inverter

In order to reduce the switching loss of the cascaded H-bridge three-level inverter, a minimum switching loss algorithm using space vector pulse width modulation (SVPWM) for cascaded H-bridge multilevel inverter is proposed. The proposed algorithm takes advantage of the topology of the cascaded H-bridge three-level inverter, using all of the redundant switching states of the reference voltage vector for the design of minimum switching loss. The method of determining the region of the reference voltage vector is given in the paper, which avoids the complex sector judgment. Then, the redundant switching states are used for the design of minimum switching loss, and a detailed method for calculating the operating state of the corresponding switch based on the reference voltage vector is given. Finally, the proposed algorithm is simulated in Matlab/Simulink environment, and then the algorithm is verified by constructing a cascaded H-bridge three-level inverter prototype. The simulation and experimental results show that compared with the traditional SVPWM algorithm, the proposed algorithm can avoid the complex sector judgment and effectively reduce the system switching loss.