{'fraction_non_alphanumeric': 0.023779724655819776, 'fraction_numerical': 0.026282853566958697, 'mean_word_length': 4.882352941176471, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
An Efficient Ladder Reflector Antenna for Interchip Communications

A new compact 24-GHz ladder reflector antenna on chip has been developed using the standard 0.18-um six metal layers complementary metal-oxide-semiconductor (CMOS) process. The antenna consists of an active dipole and a ladder reflector array. The ladder reflector array successfully adjusts the radiation direction of the active dipole and effectively suppresses the active dipole interference to chip circuit. The measured results show that the ladder reflector antenna has a 6.25-dBdc gain at 24 GHz and a -6-dB S11 impedance bandwidth of 19.92 27.60 GHz . The design method presented in this letter is quite straightforward, and can be used to develop antenna on chip for the wireless interconnect for interchip communications.