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BiCMOS circuit technology for a high speed SRAM

BiCMOS technology is necessary to develop a large capacity SRAM with a high operating speed approximating that of a bipolar ECL RAM. Conventional BiCMOS circuits(1) can not obtain high speed operation as bipolar circuits, because the logic swing and circuit stages are large. However, using conventional bipolar circuits for the SRAM peripheral circuits results in large power dissipation. In this paper, a high speed and low power decoder with bipolar logic circuits and a high speed BiCMOS multiplexer with an emitter follower for the data line driver are proposed.