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Reversible Logic Based 1-bit Comparator using QCA

Heat and energy dissipation are the immense problems in today's processor design. These problems can be overcome if the reversible logic is used for the design implementation. In this paper, the 1-bit comparator based on reversible logic is proposed. Further, the reversible logic gates used in the proposed design are implemented using “Quantum-dot Cellular Automata (QCA) nanotechnology”. QCA is viable technology among various nanotechnology through which reversible logic can be implemented at device level with low energy, less area and high speed. The simulation is backed by the QCADesigner tool. The proposed design is single layered which is also optimized for area, energy and delay.