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Status Counting Double Edge Slope ADC for CMOS Image Sensors

Compared with single edge slope ADC used in CMOS image sensors, double edge counting can half the conversion time without increase the counting clock frequency. In this paper, we present a power and area improved status counting double edge concept. It can be implemented together with double clock counting architecture we presented before, which is very suitable for low power and small pixel pitch column ADCs of CMOS image sensors. A fabricated 43M CMOS image sensor is used to verify this ADC. Only 2.8µs is needed for the 12-bit conversion with 1GHz/31.25MHz clock counting. More than 67.5dB dynamic range is achieved.