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A low-power CMOS LNA using noise suppression and distortion cancellation techniques with inductive bandwidth extension

A low-noise amplifier (LNA) for wideband wireless systems faces many challenges like small noise figure and high linearity. Usually these performances are the trade-offs with power consumption. In this work, we propose a CMOS LNA that integrates three circuit techniques, including a multi-gate distortion cancellation, noise suppression feedback, and bandwidth extension for performance improvement with low power. The LNA uses a 0.18μm CMOS and dissipates 1.5 mW from a 1.2V supply voltage. The voltage gain is 14 dB. The measured IIP3 is 5 dBm at 500 MHz that is 9 dB enhanced by the distortion cancellation. The noise figure at low frequency is 4.3 dB, that is 3.2 dB improved by the noise suppression technique. The voltage-enhanced network extends the 3-dB bandwidth to 2.95 GHz and achieves a minimum noise figure of 2.9 dB.