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Design optimization of voltage controlled oscillators in consideration of parasitic capacitance

This paper presents a study of design optimization of voltage-controlled oscillators. The phase noise of LC-type oscillators is basically limited by quality factor of inductors. It is experimentally known that higher-Q inductors can be achieved at higher frequencies while oscillation frequency is limited by parasitic capacitances. In this paper, the minimum transistor size and degradation of quality factor caused by the switched-capacitor array are analytically estimated, and the maximum oscillation frequency of VCOs is also derived from the equivalent circuit considering parasitic capacitances. According to the analytical evaluation, the phase noise of VCO using 65-nm CMOS is 2 dBc/Hz better than that of 180-nm CMOS.