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Design and implementation of BPSK demodulator for onboard satellite telecommand receiver

A Binary Phase Shift Keying (BPSK) demodulator using squaring Loop technique is designed and successfully implemented, hardware realization of demodulator architecture has been carried out and results are presented. The recovered output is differentially decoded to mitigate the phase ambiguity in BPSK demodulation process. The fabricated demodulator works at a carrier frequency of 8 KHz and has been tested at data rate of 1Kbps. Although the fabricated BPSK demodulator is tested for the data rate of 1Kbps, yet it can be tested for any data rate up to 8Kbps.