{'fraction_non_alphanumeric': 0.026041666666666668, 'fraction_numerical': 0.0008680555555555555, 'mean_word_length': 5.703488372093023, 'pattern_counts': {'":': 0, '<': 0, '<?xml version=': 0, '>': 0, 'https://': 0, 'lorem ipsum': 0, 'www.': 0, 'xml': 0}, 'pii_count': 0, 'substrings_counts': 0, 'word_list_counts': {'cursed_substrings.json': 0, 'profanity_word_list.json': 0, 'sexual_word_list.json': 0, 'zh_pornsignals.json': 0}}
Composite PUF: A new design paradigm for Physically Unclonable Functions on FPGA

Physically Unclonable Function (PUF) designs proposed in the recent literature vary widely in diverse characteristics such as hardware resource requirement, reliability, entropy, and robustness against mathematical cloning. Most of the standalone PUF designs suffer from either poor performance profile or unacceptable resource-overhead. We present a novel PUF design paradigm, termed as PUF Composition, that utilizes smaller PUFs as design building blocks to define a “Composite PUF” having larger challenge-space and superior performance profile at reasonable resource-overhead. A formal framework for PUF composition based on a probabilistic model has also been developed to enable the Composite PUF designer to have a-priori estimate of the relative qualities of several composite PUF options, without actually implementing them physically. The notion of PUF composition, and the probabilistic model developed for delay-PUFs, have both been validated using Ring Oscillator PUF (ROPUF) and Arbiter PUF (APUF) on Xilinx Spartan-3 Field Programmable Gate Array (FPGA).