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Simulation based cause and effect analysis of cycle time distribution in semiconductor backend

We analyzed the effect of a number of controllable input parameters on cycle time distribution and other output variables in a complex semiconductor backend manufacturing system, using a data driven, discrete event simulation model. A validated model was used as the base case and the effects were quantified against the base model to analyze the relative merits and sensitivity of each of these input variables. Input variables that are analyzed include lot release controls, heuristic scheduling rules, machine up time, setup time, material handling time, product flow, and lot size. We have used actual data from a major semiconductor backend site for our analysis and showed the impact of lot release scheduling on cycle time distribution.