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A Setup for Automatic MOSFET Mismatch Characterization under a Wide Bias Range

This paper describes a test setup for automatic characterization of MOS transistors mismatch. It is composed by a custom made test chip, a computer and measurement equipment. The chip aggregates analog switches, a programmable shift register and a reference circuit, as well as the matrix of 1296 transistors to be tested. It was already successfully integrated in 0.35 μm and 0.18 μm bulk technologies, and was designed to give experimental support for our MOSFET mismatch model. This setup brings to low-budget research laboratories, the facility of a completely autonomous dc characterization, over a wide range of operation conditions, from weak to strong inversion and from linear to saturation region, allowing statistical analysis of MOSFET process and devices.