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Automated IP quality qualification for efficient system-on-chip design

The robustness and reusability of Intellectual Properties (IPs) is the key to the success of the modern System on chip (SoC) designs. Therefore, it is very important to implement a rigid IP qualification platform to ensure the quality of IPs in the SoC design flow. In this paper, we propose an automated IP qualification platform, which uses XML schema technique to describe the quality model and has a layered architecture referred to the concepts from software metric theory. The experimental results on three open source IPs show that the qualification platform can not only improve accuracy of qualification results, but also accelerate the qualification process. Actually, more than 60% time savings are expected through the proposed automated IP qualification.