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Accurate energy exploration in low-power MAC architectures

This paper presents an analytical model for the transition activity in Multiplier-Accumulator and Multiplier-Multiple-Accumulator architectures implementing FIR filters. The model allows bit-level accurate estimations that can be used to explore the energy efficiency of different power reduction techniques at high levels of abstraction. The approximation procedure has been evaluated for different synthetic and real data sets. In all cases, an excellent accuracy compared to more expensive bit level simulations is reported.