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Lowand high frequency harmonic reduction in a PWM inverter using dithered sigma-delta modulation

This paper presents the use of dithered sigma-delta modulation (ΣΔM) to mitigate low and high frequency harmonics of pulse-width modulated (PWM) inverters without increasing switching losses. A PWM bit stream generated by a 1bit- 1st-order discrete ΣΔM is converted into a continuous pulse train which controls the inverter operation. The minimum pulse width of the pulse train is strictly defined by the sampling ratio, which prevents the inverter from missing switching operations. The spectrum of the pulse train demonstrates reduction of low and high frequency harmonics compared with the conventional sinusoidal PWM (SPWM), dithered SPWM, and carrier frequency modified SPWM spectra. The dithered ΣΔM bounds all spectral densities including harmonics and noise below −30dB with respect to the fundamental density without increasing the number of switching, while comparable SPWM methods produce harmonic peaks at a particular frequency or increase the number of switching.