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Targeting FPGA-based processors for an implementation-driven compiler construction course

This paper describes the adaptation of a modern compiler construction course to target an FPGA-based hardware platform used throughout our computer science curriculum. One of the significant challenges in teaching using modern hardware platforms is the inordinate complexity of commonly used systems. To avoid this, many compiler courses target a less complex platform implemented via a simulator or a higher-level virtual or abstract hardware platform. To avoid the complexity of a modern superscalar multicore architecture and to improve the kinesthetic experience of students implementing the course compiler, we have provided a framework and runtime support for using an FPGA-based RISC CPU as the target for the compiler backend. Using this system allows students to leverage knowledge gained in earlier organization and architecture classes using the same system, while also providing a hands-on active learning component at the completion of the compiler implementation.