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The impact of TID effect on EMS of PDSOI voltage reference circuits

The paper studies the impact of total ionizing dose (TID) effect on the electromagnetic immunity of voltage reference circuit fabricated with 0.18μm Partial Depletion (PD) Silicon-On-Insulator (SOI) CMOS technology. Experiments results show that the output reference voltage of radiation hardened circuit is relatively stable with the dose accumulation up to 300 krad(Si). However, the susceptibility of VSS pin to the high frequency substrate noise deteriorated after irradiation and was partially recovered after 168 hours annealing at room temperature. It can be concluded that for the radiation hardened design of voltage reference, we need to consider not only circuit leakage power and DC electrical characteristics, but also the electromagnetic compatibility of the power supply of the circuit, especially the substrate crosstalk performance.