Si (semiconductor) charge carriers V = 0 V = V$_{DS}$ (drain source) V = V$_{GS}$ (gate source) traps Metal SiO$_{2}$ (oxide) emission capture FIG. 2: A scheme of a complementary metal oxide semiconductor device (CMOS transistor), composed by a fine metal plate, an oxide (SiO2), and a semiconductor (Si). A voltage V$_{GS}$ (gate source) has a role of attracting the electrons to the top of semiconductor near of the oxide. Other voltage V$_{DS}$ moves the charge carriers generating a drain current. The charge carriers under a Fermi Level can be captured or emitted come back to the current along time evolving according to Fermi-Dirac statistics. These successive captures and emissions generate the known random telegraph signals. we aim at a theoretical analysis to describe the density of occupied traps in a semiconductor device and so to understand how a characteristic degradation process occurs in these devices and other similar devices. So, first of all, we need to calculate the probability of a particular trap with constants τ$_{c}$ and τ$_{e}$ starting from state 0 (empty) and after a elapsed time t it is in this same state, which we denote p$_{00}$ ( t ). This probability can be calculated observing that ([1], [3]): P$_{01}$ ( t + dt ) = P$_{01}$ ( t ) p (1 → 1) + P$_{00}$ ( t ) p (0 → 1) 4