FIG. 5: (a) Graphene transistor array with density 40,000 devices per cm $^{2}$. Scale bar is 100 µ m. (b) Room temperature ambipolar gating effect: conductance G vs. gate voltage V$_{sd}$ . Inset: an individual FET consisting of source (S), drain (D), graphene channel, and gate (G). Scale bar is 20 µ m. 13 − 20 − 10 0 10 20 0.9 0.95 1 1.05 1.1 V$_{g}$ (V) G (mS − sq.) G S D (b)