280  IBM z15 (8561) Technical Guide GLYPH<SM590000> Subcapacity Boost (for systems with CPs running at a subcapacity index 4xx, 5xx, or 6xx).  For LPARS running on subcapacity processors, during the boost period the allocated CPs  are boosted to full capacity (7xx) without increasing software cost. Transactional Execution System Recovery Boost The functioning of a zIIP is transparent to application programs. The supported operating  systems are listed in Table 7-3 on page 260. On z15 servers, the zIIP processor is designed to run in SMT mode, with up to two threads  per processor. This function is designed to help improve throughput for zIIP workloads and  provide appropriate performance measurement, capacity planning, and SMF accounting  data. This support is available for z/OS V2.1 with PTFs and higher. Use the  PROJECTCPU  option of the IEAOPTxx parmlib member to help determine whether zIIPs  can be beneficial to the installation. Setting  PROJECTCPU=YES  directs z/OS to record the  amount of eligible work for zIIPs in SMF record type 72 subtype 3. The field APPL% IIPCP of  the Workload Activity Report listing by WLM service class indicates the percentage of a  processor that is zIIP eligible. Because of the zIIP’s lower price as compared to a CP, even a  utilization as low as 10% can provide cost benefits. The IBM zEnterprise EC12 introduced an architectural feature called Transactional Execution  (TX). This capability is known in academia and industry as  hardware transactional memory .  Transactional execution is also implemented on subsequent IBM Z servers. This feature enables software to indicate to the hardware the beginning and end of a group of  instructions that must be treated in an atomic way. All of their results occur or none occur, in  true transactional style. The execution is optimistic.  The hardware provides a memory area to record the original contents of affected registers  and memory as the instruction’s execution occurs. If the transactional execution group is  canceled or must be rolled back, the hardware transactional memory is used to reset the  values. Software can implement a fallback capability.  This capability increases the software’s efficiency by providing a way to avoid locks (lock  elision). This advantage is of special importance for speculative code generation and highly  parallelized applications. TX is used by IBM Java virtual machine (JVM) and might be used by other software. The  supported operating systems are listed in Table 7-3 on page 260 and Table 7-4 on page 262. System Recovery Boost is a new feature that was implemented on the IBM z15 system. This  feature provides higher temporary processing capacity to LPARs for speeding up shutdown  and IPL operations, without increasing software costs. For more information, see Appendix B,  “System Recovery Boost” on page 491. The temporary processing capacity boost is intended to help workloads catch-up after an IPL  (planned or unplanned) to work faster through a backlog after a downtime, which improves  overall system availability by reducing the elapsed time required to recover service. The capacity boost is available on an LPAR basis and is provided for general-purpose  processors (CPs) and the using operating systems. The following types of temporary boost  capacity (see Table 7-14 on page 281 for operating system support) are available: