the screening length is a significant fraction of the diameter and the suspension distance - this plays a critical role in observing the effect of density gradients within the cross-section of the nanowire. In case of single walled carbon nanotube, diameter is 1-2 nm and height of suspension is typically 100nm or more [13–16]. Additionally the screening length in carbon nanotubes is typically several multiples of the nanotube diameter [36], so due to an increased ratio of suspension distance to diameter and the large screening length compared to the diameter it is very difficult to observe the physics we discuss for the case of nanowires in carbon nanotubes. We would like to point out that this is not a peculiarity of the InAs nanowires and should be seen in other semiconducting nanowire devices as well with similar dimensions. Additionally, if one considers the realistic case with non-uniform density of carriers in the NW due to the device geometry [37] the NW will have a gradient of dielectric constant [38]. A gradient of dielectric constant [39] alongwith a change in capacitance as a function of the density changes the capacitive coupling of the NW to the gate. This results in differing amplitudes for two different electron densities. Our device geometry with NW diameter comparable to the gap accentuates this effect. In order to better understand the effect of the gate voltage in tuning the spatial charge density across the cross-section of the nanowire we selfconsistently solve three dimensional Poisson’s equation using finite element method for our device geometry. We use approach followed by Khanal et al. [37] by solving ∇ · ϵ$_{d}$ ∇ Φ( x, y, z ) = ρ ( x, y, z ), throughout the space of the nanowire and its dielectric environment (here ϵ$_{d}$ is dielectric constant, Φ is the local electrostatic potential in the system due to applied gate voltage, and ρ is space charge density inside the NW). The geometry consists of a 100 nm diameter and 1.5 µ m long InAs nanowire clamped by metallic electrodes. The wire is suspended 100 nm above a 300 nm thick silicon- oxide dielectric on the gate electrode. Inside the nanowire the ρ ( x, y, z ) = e ( N$_{d}$ − n (Φ)+ p (Φ)) where e is the charge of an electron, N$_{d}$ is the density of the n-type dopants ( ∼ 10 $^{16}$cm − $^{3}$), n (Φ) and p (Φ) are the densities of electrons and holes. The unintentional source of n-type dopants in our growth is Si and C, from the metal organic precursors and are assumed to be uniformly distributed throughout the nanowire. A selfconsistent calculation gives us the distribution of potential throughout the space and space charge density in the nanowire. Fig.3a and 3b show the colourscale distribution of potential when the V DC g = − 5 V. In order to model the consequences of modifying gate voltage we calculated the distribution of space charge density through the nanowire for V DC g = − 25 , − 5 and 5V. Fig.3c, 3d, 3e, and 3f 6