26 sidewall damage effects since these could impact device operation, especially if the damaged portion is close to or part of the active switching volume of the PCM. Cho et al[146] developed a novel GST sputter depo- sition process with in-situ deposition/etch/deposition, in order to fill GST into high aspect-ratio ( > 2:1) pores of approximately 50 nm diameter. A number of groups[134, 156, 173, 174] have investigated chemical va- por deposition (CVD) of GST and related phase change materials. Kim et al[173] deposited hexagonal phase GST by MOCVD at temperatures in the range 330- 370 $^{◦}$C using precursors that were bubbled at different temperatures, demonstrating complete filling into 120nm diameter trenches with aspect-ratio larger than 1.6. How- ever, it should be noted that in contrast to sputter de- position, CVD processes are far less flexible with respect to changes in material composition. A number of groups have reported wet etching of phase change materials using alkaline[176–178] as well as acidic[179, 180] solutions. Depending on the etchant and specific phase change material etched, in some cases the crystalline material was found to have etched faster than the amorphous phase while the opposite was true in other cases. Cheng et al[179] used X-ray Photo- electron Spectroscopy (XPS) and Inductively Coupled Plasma (ICP) to study the wet etch mechanism of GST. They explained their results, obtained with a 20% aque- ous solution of nitric acid, as a chemical etching pro- cess that involves bond-breakage, oxidation of the vari- ous constituents, and dissolution of those oxides. They inferred that the Sb component was hardest to etch. The authors used this wet etching process to fabricate large PCM cells (400 µ m × 400 µ m) and performed I-V mea- surements showing successful switching of devices from the high to low-resistance states. There have been a number of studies of plasma etch- ing of phase change materials such as GST and its doped variants. A variety of gas chemistries have been reported in the literature, including Cl$_{2}$/Ar[181– 186], CHF$_{3}$/Ar[181], CF$_{4}$/Ar[186, 187], HBr/Ar[188], CHF$_{3}$/O$_{2}$[189, 190], and CHF$_{3}$/Cl$_{2}$/Ar[155]. Some of these studies have examined the effects of varying process parameters such as reactant gas concentration fraction, chamber pressure, coil power, and dc bias on the etch rate and anisotropy (i.e. etched sidewall profile). Yoon et al[181] indicated that the GST removal mecha- nism in high density helicon plasma etching using Cl$_{2}$/Ar chemistry was due to ion-assisted chemical etching. They reported GST etching selective to SiO$_{2}$ and did not notice any significant change in GST composition after etching. In the same work, the authors also studied the CHF$_{3}$/Ar chemistry and observed that the GST removal in this case was by physical etching due to ion bombardment. They noticed a small decrease in the Ge/Te ratio after this etching process. Min and coworkers[185] also performed a systematic study of GST etching in Cl$_{2}$/Ar using an inductively coupled plasma (ICP). Using a model that analyzed etch kinetics, they explained the GST removal mechanism as a combination of spontaneous and ion- assisted chemical etching. They suggested that TeCl$_{4}$, not being as volatile as the Ge and Sb chlorides, accumu- lated on the surface and was removed by ion-stimulated desorption. In their etching studies of GST films us- ing HBr/Ar in an ICP tool, Lee et al[188] pointed to the role of hydrogen in passivating the etched surface as well as the sidewalls, leading to more anisotropic etch- ing and lower etch rates at higher HBr concentrations. Their XPS analysis showed that as the etch progressed, the surface became Te-deficient and Ge- and Sb-rich im- plying that Te reacted most readily with the bromine and was preferentially etched. Attempting to form nanoscale features into GST with Etching of phase change materials has been explored using both wet as well as dry etching schemes. Such steps are important for electrical isolation in most cell designs, and are absolutely critical for cell designs such as the pil- lar cell that depend on subtractive processing to produce a confined volume of phase change material. Some im- portant parameters that are studied in developing etch processes are etch rate, selectivity (i.e. how fast the de- sired PCM etches compared to the masking layer and other surrounding films), and anisotropy (etched sidewall angle; steeper profiles are usually desirable since they en- able higher resolution patterning). It is also important to understand etch-induced material modification and other 2. Etching Lee and coworkers[156] used CVD to deposit GST from metal-organic precursors and hydrogen at 350 $^{◦}$C into high aspect-ratio (3:1) 50nm contact holes. X-ray diffrac- tion (XRD) measurements showed that the GST had a hexagonal phase and was thermally stable up to 400 $^{◦}$C. CMP was used to planarize the GST, confining it to the contact holes (and removing it from everywhere else). Devices fabricated with this technique showed a signif- icant reduction in RESET current as well as good en- durance. Im et al[134] used CVD GST to fill high aspect- ratio (4:1) dash-type contacts of 7.5nm width. As ex- pected from device modeling, these cells showed very low (160uA) RESET currents. In addition, these devices also had fast SET speeds and very good endurance. Lee et al[175] developed atomic layer deposition (ALD) of GST with the assistance of an H$_{2}$ plasma. They syn- thesized new precursors for the GST deposition and ob- tained good step coverage (90%) in 7:1 aspect-ratio holes. Finally, Milliron et al[71] developed a solution-based de- position method for GeSbSe films using hydrazine and Se to form soluble precursors, so that film composition and properties were tunable through appropriate combina- tion of these novel precursors in solution. XRD and laser pulse annealing were used to study the phase change and crystallization speed, and complete filling was demon- strated in 2:1 aspect-ratio vias patterned in thermal sili- con oxide.