An example of an MES upgrade for processors (with two upgrade steps) is shown in  Figure 8-3. A model T01 max 34 (one processor drawer), model capacity identifier 708 (eight CPs), is  concurrently upgraded to a model T01 max 71 (two processor drawers), with MCI 739 (39  CPs). The model upgrade requires adding a processor drawer and assigning and activating  39 PUs as CPs. Then, model max 71, MCI 739, is concurrently upgraded to a capacity  identifier 740 (40 CPs) with two IFLs. This process is done by assigning and activating three  more unassigned PUs (one as CP and two as IFLs). If needed, more LPARs can be created  concurrently to use the newly added processors. The example that is shown in Figure 8-3 was used to show how the addition of PUs as CPs  and IFLs and the addition of a processor drawer works. The addition of a processor drawer to  a z15 Max 34 upgrades the machine to Max 71. After the second CPC drawer addition, CPC drawer 0 has 34 configurable PUs and CPC  drawer 1 has 37 configurable PUs, which allows 71 PUs to be characterized on the new Max  71 configuration. Consideration:  Up to 190 logical processors (including reserved processors) can be  defined to an LPAR. However, do not define more processors to an LPAR than the target  operating system supports. Chapter 8. System upgrades  347 Figure 8-3 MES for processor example 8561 T01 Max 34 MCI 708 (Drawer 0, 34 CPs) with Feat #2271 CP CP CP CP CP CP CP CP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP 8561 T01 Max 71 MCI 739 (Drawer 0, 34 CPs; Drawer 1 37 CPs) CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP MES + 31 CPs  (+ 1 Drawer) 8561 T01 Max 71 MCI 740 (Drawer 0, 34 CPs; Drawer 1 37 CPs) CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP CP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP SP IFL IFL MES + 1 CP + 2 IFLs 