30 cells should show data retention exceeding 10 years at 118 $^{◦}$C (instead of 10 years at 105$^{◦}$C shown earlier). This is largely because the energy barrier for nucleation is larger at higher temperatures (as the driving force for crystallization reduces), causing the increase of nucle- ation rate with temperature to be less than Arrhenian. Gleixner et. al[169] studied large-sized PCM arrays fabricated with 180 nm and 90 nm technology in order to study new defect failure modes and retention loss at the PPB level. They noticed that even at the lowest times used to measure retention (at elevated temperatures), a small fraction of the bits ( < PPM) had already failed, indicating that the time to failure for the first cell is not accurately predicted by the failure curve. It was also shown that these tail bits show similar initial resistances to the nominal bits and similar activation energy of the time-to-failure (2.4 eV). Furthermore these tail bits show a Weibull distribution consistent with a weak-link failure mechanism, in which rare combinations of closely-set nu- clei can lead to rapid retention loss. Although the same fraction of bits fail (to within 10%) during each test, it was different bits that occupy this tail (and thus fail) each time. This indicates that manufacturing defects were not responsible for these tail-bit failures. It was therefore postulated that the most likely cause of this fail- ure comes from a scenario where the nucleation sites are arranged such that when thermal energy is applied, very little growth is required before a quick resistance decrease can be observed. Data also showed that cycling has no impact on retention — if anything a slight improvement was observed. Gleixner et. al[169] also showed that op- timization of the process and the write scheme could be used to significantly suppress these tail bits, although the exact nature of this optimization was not discussed in detail. Work done by Shih et. al[170], albeit with slightly worse data retention, concluded that a large fraction of the bits fail due to grain growth from the amorphous / crystalline boundary. While this retention loss mecha- nism has not been observed before (presumably due to a reduction in grain growth velocity at lower tempera- tures), these differences could be attributed to differences in nucleation and growth properties of the materials used in the different experiments. Clearly, reducing the crys- tal growth component at retention temperatures would be an important step in improving the retention times. Finally, Redaelli et. al[204] showed that the value of the threshold resistance that is chosen to define the re- tention failure criterion directly impacts the calculation of the activation energy ( E$_{A}$ ) extracted for failure times. This might explain the wide variability in previously re- ported E$_{A}$ values, ranging from 1.9 eV to 3.5 eV. They concluded that reliable extraction of the activation en- ergy of crystallization can be obtained by using a critical threshold resistance that is close to the crystalline resis- tance, or by performing all resistance measurements at room temperature. Finally, it should be mentioned that while much of the It is thus not surprising that, upon learning these two facts, many engineers introduced to PCM immediately ask about the thermal crosstalk between cells. In particu- lar, the worst-case scenario is the effect on an amorphous plug encoding the RESET state when one or more of the immediately neighboring cells is programmed through multiple RESET-SET cycles. What is truly surprising is From the discussion in Section III A, it is clear that during the RESET operation the peak temperature within a PCM device exceeds the melting point of the phase change material. In fact, since the extent of the amorphous plug quenched from the molten state must be larger than the critical dimension of the limiting aper- ture, the material at the edge of this aperture is just over the melting point, and the peak temperature in the center of the cell is well over the melting temper- ature. As an example, Ge$_{2}$Sb$_{2}$Te$_{5}$ melts at ∼ 630 $^{◦}$C [38], and other phase-change materials have similar melting temperatures[210]. However, from Section IV A, any sig- nificant exposure of this amorphous plug (once it has been formed) to temperatures exceeding 150 $^{◦}$C or so will lead to the recrystallization of enough crystalline nuclei within the plug to induce data loss. B. Crosstalk work described here deals with GST, the exact compo- sition and doping of the GST that has been explored by different groups is very likely different. This itself could alter the value of the measured activation energy. A number of groups have also investigated alternate PCM materials and doping as a way to increase the activation energy for crystallization and to increase retention mar- gins. Matsuzaki et. al[205] showed that oxygen doping of GST films results in a much higher activation energy due to a smaller grain size — which leads to improved re- tention. Kim et. al[197] also showed that N-doped GST single-cell PCM devices show retention lifetimes exceed- ing 10 years at 85 $^{◦}$C. They also concluded that the ac- tivation energy is lower for devices compared to blanket films because of process-induced damage and defects at the interface between the bottom electrode and the GST — effects that have to be minimized in order to maximize retention. Morikawa et. al[206] have also explored In-Ge- Te as a phase change material and have shown that its retention properties are significantly better than GST, ranging from 10 years at 122 $^{◦}$C to 156$^{◦}$C depending on the Indium fraction. Other materials explored for im- proved PCM retention include doped GeSb[42], Si-doped Sb$_{2}$Te$_{3}$[207] and Si$_{x}$Sb$_{1}$$_{−}$$_{x}$[208],[209]. However, only very basic materials studies have been carried out for most of these new materials, and detailed array data such as the study of tail bits is lacking. Further materials develop- ment will be key for improved retention as the size of the amorphous plug shrinks with scaling, as well as for im- proved tail-bit retention, MLC capability and proximity- disturb performance.