9.1 RAS strategy 9.2 Technology 9.2.1 Processor Unit chip The RAS strategy is to manage change by learning from previous generations and investing  in new RAS function to eliminate or minimize all sources of outages. Enhancements to z14  RAS designs are implemented on the z15 system through the introduction of new technology,  structure, and requirements. Continuous improvements in RAS are associated with new  features and functions to ensure that IBM Z servers deliver exceptional value to clients. The following overriding RAS requirements are principles as shown in Figure 9-1: This section introduces some of the RAS features that are incorporated in the z15 design. The Processor Unit (PU) chip includes the following features: GLYPH<SM590000> Inclusion of existing (or equivalent) RAS characteristics from previous generations. GLYPH<SM590000> Learn from current field issues and addressing the deficiencies. GLYPH<SM590000> Understand the trend in technology reliability (hard and soft) and ensure that the RAS  design points are sufficiently robust. GLYPH<SM590000> Invest in RAS design enhancements (hardware and firmware) that provide IBM Z and  Customer valued differentiation. GLYPH<SM590000> A Single Chip Module (SCM) uses 14nm SOI technology and consists of 17 layers of  metal, over 9.1 billion transistors, cores running at 5.2 GHz with 12 cores per PU SCM, all  of which enhances the thermal conductivity and improves the reliability. GLYPH<SM590000> L3: – Symbol ECC on L3 data cache – 256MB (double the size of L3 in z14) – Ability to monitor (dynamically) fenced macros – Dynamic cache monitor (“stepper”) to find and demote HSA lines in the cache – Wordline span reduced (less impact) – Dynamic uMasking for subarrays GLYPH<SM590000> L2: L2-I (Instruction) is now 4MB (double compared to z14 L2-I) 382  IBM z15 (8561) Technical Guide Figure 9-1 Overriding RAS requirements