– Reduced effect on MCL updates – Better availability GLYPH<SM590000> Faster Dynamic Memory Relocation engine: – Enables faster reallocation of memory (2x faster) that is used for LPAR activations,  CDR, and concurrent upgrade – Provides faster, more robust service actions GLYPH<SM590000> Dynamic Time Domain Reflectometry (TDR), which was static GLYPH<SM590000> Universal spare for PU SCMs and SC SCMs and processor drawer GLYPH<SM590000> Continued use of RAIM with ECC. GLYPH<SM590000> No cascading of memory DIMM to simplify the recovery design. GLYPH<SM590000> Replay buffer for hardware retry on soft errors on the main memory interface. GLYPH<SM590000> Redundant I/O pins for clock lines to main memory. Hardware facility that is used to isolate failures on wires provides better FRU isolation and  improved service actions. z14 ZR1 continues the z13s enhancements that reduced system complexity. Specifically,  simplifications were made in CPC drawer technology, which reduces the number of CPC  drawers to one and RAIM recovery in the memory subsystem design. Memory DIMMs are not  cascaded, which eliminates the double FRU call for DIMM errors.  Independent channel recovery with replay buffers on all interfaces allows recovery of a single  DIMM channel, while other channels remain active. More redundancies are incorporated in  I/O pins for clock lines to main memory, which eliminates the loss of memory clocks because  of connector (pin) failure.  The following RAS enhancements reduce service complexity: IBM Z RAS efforts focus on the reduction of unscheduled, scheduled, planned, and  unplanned outages. IBM Z technology has a long history of demonstrated RAS  improvements, and this effort continues with changes that reduce service  touches  on the  system.  Firmware was updated to improve filtering and resolution of errors that do not require action.  Enhanced integrated sparing in processor cores, cache relocates, N+1 SEEPROM and POL  N+2 redundancies, and DRAM marking also are incorporated to reduce touches. The  following RAS enhancements reduce service touches: 9.4 Reducing complexity 9.5 Reducing touches GLYPH<SM590000> Improved error resolution to enable filtering GLYPH<SM590000> Enhanced integrated sparing in processor cores GLYPH<SM590000> Cache relocates GLYPH<SM590000> N+1 SEEPROM GLYPH<SM590000> N+2 POL GLYPH<SM590000> DRAM marking Chapter 9. Reliability, availability, and serviceability  331