The effect of this variability is increased deviations of workloads from single-number  metric-based factors, such as millions of instructions per second (MIPS), MSUs, and CPU  time charge-back algorithms. The workload variability for moving from z13 to z14 is expected to be stable. Workloads that  are migrating from zEC12 and prior generations to z14 can expect to see similar results with  slightly less variability than the typical z13 experience. Experience demonstrates that IBM Z servers can be run at up to 100% utilization levels,  sustained. However, most clients prefer to leave some room and run at 90% or slightly under.  For any capacity comparison exercise that uses a single metric, such as MIPS or MSU, is not  a valid method. When deciding the number of processors and the uniprocessor capacity,  consider the workload characteristics and LPAR configuration. For these reasons, the use of  zPCR and involving IBM technical support are recommended when you plan capacity. 12.7.1 Main performance improvement drivers with z14 servers Chapter 12. Performance  455 z14 servers are designed to deliver new levels of performance and capacity for large-scale  consolidation and growth. The attributes and design points of z14 servers contribute to overall  performance and throughput improvements as compared to the z13. The z/Architecture implementation includes the following enhancements: The z14 microprocessor includes the following design enhancements: GLYPH<SM590000> Guarded Storage Facility: An enhancement for garbage collected languages.  GLYPH<SM590000> Vector Packed Decimal Facility: An enhancement of packed decimal operations. GLYPH<SM590000> Vector Enhancements Facility: Includes several vector enhancements, such as adding  support for single precision floating point and VMSL for cryptographic computations. GLYPH<SM590000> Order Preserving Compression and Entropy Encoding for CMPSC: Allows comparisons  against compressed data. Entropy Encoding increases compression ratio. GLYPH<SM590000> Miscellaneous New General Instructions: An enhancement of 64-bit halfword operations  and new multiply instructions. GLYPH<SM590000> Removal of Runtime Instrumentation External Interruption: Avoids RI Buffer Full interrupt. GLYPH<SM590000> Semaphore Assist Facility, Enhanced NIAI (next instruction access intent) code points. GLYPH<SM590000> (MSA 6, 7, 8), adding SHA-3 hash, true random number generation, and AES-GCM mode. GLYPH<SM590000> 14nm FINFET SOI technology with IBM embedded dynamic static random access  memory (eDRAM) technology GLYPH<SM590000> Up to 10 active processor cores per chip GLYPH<SM590000> Clock frequency at 5.2 GHz GLYPH<SM590000> A new translation/TLB2 design with four hardware-implemented translation engines  reducing latency when compared with one pico-coded engine on z13 GLYPH<SM590000> Branch prediction improvements: – 33% Branch Target Buffer (BTB)1-and-2 growth – New perceptron predictor  – Simple call-return stack