FlashSystem 900 AE3 performance is depending on the following areas: The relationship of the IBM MicroLatency modules internal structure and the number of  FPGAs per cards within the IBM MicroLatency modules is shown in Figure 2-3.  GLYPH<SM590000> Number of FPGAs  GLYPH<SM590000> Capacity of IBM MicroLatency modules  GLYPH<SM590000> Number of NAND chips on IBM MicroLatency cards in side the modules 2.1.2 Performance and capacity considerations  Figure 2-3 IBM MicroLatency modules and FPGA internal structure Consider the following points: Figure 2-3 also shows that the Medium, Large, and XLarge IBM MicroLatency modules  features two FPGAs that are connected to the XBARs to service data requests.  An estimation of the performance of FlashSystem 900-AE3 (depending on the MicroLatency  module capacity and the number of modules that are installed in a system) is listed in  Table 2-1. Chapter 2. IBM FlashSystem 900 Model AE3 architecture  33 Table 2-1 Number of FPGA for performance considerations Configuration Small modules Medium, large and XLarge  modules 6 MicroLatency modules 4 FPGA for performance N/A 8 MicroLatency modules 6 FPGA for performance 12 FPGA for performance 10 MicroLatency modules 8 FPGA for performance 14 FPGA for performance 12 MicroLatency modules 10 FPGA for performance 16 FPGA for performance GLYPH<SM590000> The Small (3.6 TB) module includes one FPGA chip, which serves 12 NAND flash chips.  GLYPH<SM590000> The Medium (8.5 TB) module features two FPGAs, which serve 28 NAND flash chips.  GLYPH<SM590000> The Large (18 TB) module includes two FPGAs and serves 56 NAND flash chips. GLYPH<SM590000> The XLarge (18 TB) module includes two FPGAs and serves 56 NAND flash chips