15  EP 1 499 943 B1 16  circuit. frequency regulation logic to change an operat- ing frequency of the first integrated circuit, the frequency regulation logic to receive signal from the program. voltage regulation logic to change an operating voltage of the first integrated circuit, the voltage regulation logic to receive a signal from the pro- gram. detecting (402) an event to transition an inte- grated circuit of a computing system to a higher state of performance, the integrated circuit hav- ing multiple states of performance including a firststate ofperformance,a secondstate ofper- formance higher than the first state of perform- ance, and a third state of performance higher than the second state of performance; and Detektieren (402) einesEreignisses,umeine in- tegrierte Schaltung eines Computersystems in einen höheren Performance- Zustandzuverset- zen, wobei die integrierte Schaltung mehrere Performance-Zustände aufweist einschließlich eines ersten Performance-Zustandes, eines zweiten Performance-Zustands, der höher als changing the state of performance of the inte- gratedcircuit by changingan amount of proces- sors to manage the processing load. operating the integrated circuit at the third state of performance for a transient period of time. changing an operating voltage level of the inte- gratedcircuitto change the state ofperformance of the integrated circuit. changing an operatingfrequencyoftheintegrat- ed circuit to change the state of performance of the integrated circuit. determining (404) whether the event is a user- initiated event or a software-initiated event; if the eventis a user- initiatedevent directlytran- sitioning (406) theintegratedcircuit fromthe first state of performance to the third state of per- formance based upon detecting the user event, if the event is a software-initiated event transi- tioning (408) the integrated circuit from the first state of performance to the second state of per- formance. 13. The apparatus of claim 10, further comprising: 14. The apparatus of claim 10, further comprising: 15. The apparatus of claim 10, wherein the instructions reside in a Basic Input Output System. 24. The machine-readable medium of claim 23, further comprising instructions which,when executed bythe machine, cause the machine to perform the further operations comprising: 16. The apparatus of claim 10, wherein the instructions reside in an operating system. 17. The apparatus of claim 10, wherein the instructions reside in application software. 18. The apparatus of claim 10,whereinthe first integrat- ed circuit comprises a chip set. 19. The apparatus of claim 10,whereinthe first integrat- ed circuit comprises a processing unit. 20. The apparatus of claim 15, wherein the Basic Input Output System to receive a notification signal from an operating system that the user event has curred. 21. The apparatus of claim 14, wherein the prog ram comprises an increasing state transition algorithm discretefromadecreasing state transition algorithm. 22. The apparatus of claim 10, wherein the program to transition the first integrated circuit to a next higher state of performance based upon an occurrence of a non-user event increases utilization of the first in- tegrated circuit over a preset threshold. 23. A machine-readable medium that provides instruc- tions,which whenexecuted bya machine,cause the machine to perform operations comprising: 25. The machine-readable medium of claim 23, further comprising instructions which,when executed bythe machine, cause the machine to perform the further operations comprising: 26. The machine-readable medium of claim 23, further comprising instructions which,when executed bythe machine, cause the machine to perform the further operations comprising: 27. The machine-readable medium of one of claims 23 to 26, further comprising instructions which, when executed by the machine,cause themachine to per- form the further operations comprising: 1. Verfahren, umfassend: Patentansprüche 9