13  EP 1 499 943 B1 14  [0058] Whilesomespecificembodimentsofthe inven- tion have been shown the invention is not to be limited to these embodiments.For example, most functionsper- formed by electronic hardware components may be du- plicatedbysoftware emulation. Thus, a software program could issue a command to mimic a user event command code. The algorithm detecting a user event command, even though an actual user event has not occurred, di- rectly transitions the processor to a higher state of per- formance. In an embodiment, a prioritize event may be a softwarecommand issuedto invoke thedirecttransition the processor to a higher state of performance. The in- vention is to be understood as not limited by the specific embodiments described herein, but only by scope of the appended claims. Claims 1. A method, comprising: detecting (402) an event to transition an inte- grated circuit of a computing system to a higher state of performance, the integrated circuit hav- ing multiple states of performance including a firststate ofperformance,a secondstate ofper- formance higher than the first state of performance, and a third state of performance higher than the second state of performance, the computing system having a power supply which includes a battery; determining (404) whether the event is a user- initiated event or a software-initiated event; if the eventis a user-initiated event directly tran- sitioning (406) theintegratedcircuit fromthe first state of performance to the third state of per- formance if the event is a software- initiated event transitioning (408) the integrated circuit fromthe first state of performanceto the second state of performance. 2. The method of claim 1, wherein the user event is defined byaprogramming environmentwithinwhich the computing system is operating. 3. The methodofclaim1, whereindirectlytransitioning comprises transitioning without delay. 4. The method of claim 1, further comprising: operating the integrated circuit at the third state of performance for a predefined period of time based upon thermal considerations to operate at the third state of performance without failure. 5. The method of claim 4, wherein the computing sys- tem comprises a laptop computer. 6. The method of claim 1, wherein the computing sys- tem comprises a personal digital assistant. 7. An apparatus, comprising: means (136) for detecting a user-initiated event or a software-initiated eventin a computing sys- tem; the computing system including an integrated circuit (112) having multiple states of perform- ance including a first state of performance, a secondstateof performance higherthanthe first state of performance, and a third state of per- formance higher than the second state of per- formance; meansfordeterminingwhetheradetectedevent is a user-initiated event or a software-initiated event; and means (130, 134) for directly transitioning the integrated circuit from the first state of perform- anceto the third stateofperformance basedup- on detecting that the event is a user-initiated event or for transitioning the integrated circuit fromthe first state of performanceto the second state of performance based upon detecting that the event is a software-initiated event. 8. The apparatus of claim 7, further comprising: means (134) for changing an operating frequen- cy of the integrated circuit (112) to change the state of performance of the integrated circuit. 9. The apparatus of claim 7, further comprising: means (130) for changing an operating voltage leveloftheintegratedcircuit(112)tochangethe state of performance of the integrated circuit. 10. The apparatus of one of claims 7 to 9, comprising: a computer readable medium; and a program stored in the computer readable me- dium to manage power consumption within the first integrated circuit, instructions associated with the program to directly transition the first integratedcircuit (112)fromthefirst stateofper- formance to the third state of performance based upon detecting a user event. 11. The apparatus of claim 10, wherein the first state of performance comprises a first voltage level and a first operating frequency. 12. The apparatus of claim 10, wherein the third state of performance comprises a second integrated circuit co-processing instructions with the first integrated 8