Monolithic Pixel Sensors in Deep-Submicron SOI Technology with Analog   and Digital Pixels
  This paper presents the design and test results of a prototype monolithic pixel sensor manufactured in deep-submicron fully-depleted Silicon-On-Insulator (SOI) CMOS technology. In the SOI technology, a thin layer of integrated electronics is insulated from a (high-resistivity) silicon substrate by a buried oxide. Vias etched through the oxide allow to contact the substrate from the electronics layer, so that pixel implants can be created and a reverse bias can be applied. The prototype chip, manufactured in OKI 0.15 micron SOI process, features both analog and digital pixels on a 10 micron pitch. Results of tests performed with infrared laser and 1.35 GeV electrons and a first assessment of the effect of ionising and non-ionising doses are discussed. 
Marco Battaglia, Dario Bisello, Devis Contarato, Peter Denes, Piero   Giubilato, Lindsay Glesener, Serena Mattiazzo, Chinh Vu