Fabrication and Electrical Characterization of Fully CMOS Si Single   Electron Devices
  We present electrical data of silicon single electron devices fabricated with CMOS techniques and protocols. The easily tuned devices show clean Coulomb diamonds at T = 30 mK and charge offset drift of 0.01 e over eight days. In addition, the devices exhibit robust transistor characteristics including uniformity within about 0.5 V in the threshold voltage, gate resistances greater than 10 G{\Omega}, and immunity to dielectric breakdown in electric fields as high as 4 MV/cm. These results highlight the benefits in device performance of a fully CMOS process for single electron device fabrication. 
P. J. Koppinen, M. D. Stewart, Jr. and Neil M. Zimmerman
cond-mat.mes-hall