Chaotic memristor
  We suggest and experimentally demonstrate a chaotic memory resistor (memristor). The core of our approach is to use a resistive system whose equations of motion for its internal state variables are similar to those describing a particle in a multi-well potential. Using a memristor emulator, the chaotic memristor is realized and its chaotic properties are measured. A Poincar\'{e} plot showing chaos is presented for a simple nonautonomous circuit involving only a voltage source directly connected in series to a memristor and a standard resistor. We also explore theoretically some details of this system, plotting the attractor and calculating Lyapunov exponents. The multi-well potential used resembles that of many nanoscale memristive devices, suggesting the possibility of chaotic dynamics in other existing memristive systems. 
T. Driscoll, Y. V. Pershin, D. N. Basov and M. Di Ventra
cond-mat.mes-hall