Implementation of mean-timing and subsequent logic functions on an FPGA
  This article describes the implementation of a mean-timer and coincidence logic on a Virtex-5 FPGA for trigger purposes in a particle physics experiment. The novel feature is that the mean-timing and the coincidence logic are not synchronized with a clock which allows for a higher resolution of approximately 400 ps, not limited by a clock frequency. 
J. Bieling, G. Ahluwalia, J. Barth, F. Klein, J. Pretz, H. Fischer, F.   Herrmann, C. Schill, S. Schopferer
physics.ins-det