Gate-Controlled P-I-N Junction Switching Device with Graphene Nanoribbon
  The concept of a novel graphene P-I-N junction switching device with a nanoribbon is proposed, and its basic operation is demonstrated in an experiment. The concept aims to optimize the operation scheme for graphene transistors toward a superior on-off property. The device has two bulk graphene regions where the carrier type is electrostatically controlled by a top gate, and these two regions are separated by a nanoribbon which works as an insulator. As a result, the device forms a (P or N)-I-(P or N) junction structure. The off state is obtained by lifting the band of the bulk graphene of the source (drain) side and lowering that of the drain (source) side, so that the device forms a P-I-N (N-I-P) junction. In this configuration, the leakage current can be reduced more effectively than the conventional single gate transistors with the same band gap size due to a high barrier height and a long tunneling length in the nanoribbon. The on state is obtained by flipping the polarity of the bias of either top gate to form a P-I-P or N-I-N junction. An experiment showed that the drain current was suppressed in the cases of P-I-N and N-I-P compared to the cases of P-I-P and N-I-N, and all of the behaviors were consistent with what was expected from the device operation model. 
Shu Nakaharai, Tomohiko Iijima, Shinichi Ogawa, Hisao Miyazaki,   Songlin Li, Kazuhito Tsukagoshi, Shintaro Sato, Naoki Yokoyama
cond-mat.mes-hall