Busless parallel computer memory accessing scheme
{'Code': '15030000', 'Directorate': {'Abbreviation': 'TIP', 'LongName': 'Dir for Tech, Innovation, & Partnerships'}, 'Division': {'Abbreviation': 'TI', 'LongName': 'Translational Impacts'}}
{'SignBlockName': 'Ritchie B. Coryell', 'PO_EMAI': None, 'PO_PHON': None}
Research on a novel parallel computer memory accessing                     scheme is proposed in answer to the computer industries drastic                 need for an accessing mechanism which allows an unlimited                       number of processors to simultaneously read and write to a                      central memory in fractions of a microsecond per cycle.  The                    proposed system consists of a business parallel architecture                    which will allow simultaneous parallel communications between                   an unlimited number of processors and/or a global memory.  The                  proposed system will provide a significant leap in technology                   and will prove crucial to the international race to build the                   next generation computer.                                                            The key structural element of the accessing scheme will be                 modeled, fabricated, and tested to determine significant                        operating parameters.  The results of the tests will be used to                 determine commercial viability.
{'FirstName': 'Gary', 'LastName': 'Spletter', 'PI_MID_INIT': None, 'PI_SUFX_NAME': None, 'PI_FULL_NAME': 'Gary Spletter', 'EmailAddress': None, 'PI_PHON': None, 'NSF_ID': '000341669', 'StartDate': '02/15/1988', 'EndDate': None, 'RoleCode': 'Principal Investigator'}
{'Name': 'MRAM Incorporated', 'CityName': 'Wayland', 'ZipCode': '017782434', 'PhoneNumber': '5083581005', 'StreetAddress': '16 Boston Post Road', 'StreetAddress2': None, 'CountryName': 'United States', 'StateName': 'Massachusetts', 'StateCode': 'MA', 'CONGRESSDISTRICT': '05', 'CONGRESS_DISTRICT_ORG': 'MA05', 'ORG_UEI_NUM': None, 'ORG_LGL_BUS_NAME': None, 'ORG_PRNT_UEI_NUM': None}
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{'Code': '5371', 'Text': 'SBIR Phase I'}
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