Easily Testable VLSI-Based Systems
{'Code': '05010600', 'Directorate': {'Abbreviation': 'CSE', 'LongName': 'Direct For Computer & Info Scie & Enginr'}, 'Division': {'Abbreviation': 'CCF', 'LongName': 'Division of Computing and Communication Foundations'}}
{'SignBlockName': 'Robert B Grafton', 'PO_EMAI': None, 'PO_PHON': None}
This research addresses testing and fault analysis of complex VLSI              (very large scale integrated) digital systems.  Professor Hayes will            develop new design techniques to enhance testability at the chip and            system levels, and high-level methods for test generation.  The                 research will exploit hierarchical structure and regularity inherent in         most VLSI design, while recognizing that these characteristics deviate          from the ideal.  The major objective of Hayes' research is to                   understand how to achieve very high fault coverage and low test time            for large VLSI circuits and systems.  He will investigate testability           characteristics of nearly regular VLSI chips.  Methods of increasing            the regularity of general types of nearly regular circuits to enhance           their testability will be studied.  A hierarchical approach to test             generation that employs high-level circuit and fault models will be             explored, and a study of the use of predetermined cell tests in testing         of very high level circuits will be initiated.                                  The principal investigator is an outstanding researcher with a solid            record of accomplishments over the past decade, and he very likely will         continue with first-class research.  The proposal is technically sound,         well conceived and on a good topic.  This research is in an area                important to industry, and is important to our understanding of design          of VLSI circuits and systems.
{'FirstName': 'John', 'LastName': 'Hayes', 'PI_MID_INIT': 'P', 'PI_SUFX_NAME': None, 'PI_FULL_NAME': 'John P Hayes', 'EmailAddress': 'jhayes@eecs.umich.edu', 'NSF_ID': '000311318', 'StartDate': '12/01/1988', 'EndDate': None, 'RoleCode': 'Principal Investigator'}
{'Name': 'Regents of the University of Michigan - Ann Arbor', 'CityName': 'ANN ARBOR', 'ZipCode': '481091079', 'PhoneNumber': '7347636438', 'StreetAddress': '1109 GEDDES AVE, SUITE 3300', 'StreetAddress2': None, 'CountryName': 'United States', 'StateName': 'Michigan', 'StateCode': 'MI', 'CONGRESSDISTRICT': '06', 'CONGRESS_DISTRICT_ORG': 'MI06', 'ORG_UEI_NUM': 'GNJ7BBP73WE9', 'ORG_LGL_BUS_NAME': 'REGENTS OF THE UNIVERSITY OF MICHIGAN', 'ORG_PRNT_UEI_NUM': None}
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{'Code': '471000', 'Text': 'DES AUTO FOR MICRO & NANO SYS'}
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