A Systematic Methodology for Designing VLSI Systolic Arrays with Applications in Pattern Recognition and Image Proces-  sing
{'Code': '05010300', 'Directorate': {'Abbreviation': 'CSE', 'LongName': 'Direct For Computer & Info Scie & Enginr'}, 'Division': {'Abbreviation': 'CCF', 'LongName': 'Division of Computing and Communication Foundations'}}
{'SignBlockName': 'John R. Lehmann', 'PO_EMAI': None, 'PO_PHON': None}
This research is an engineering approach to the solution of two                 fundamental problems in designing systolic arrays, namely,                      restructuring of algorithms for increased parallelism and efficient             mapping of algorithms into systolic arrays.  The study investigates:            new syntactic and semantic transformations on complex algorithms for            optimizing area, time, input/output, and other parameters in the                systolic architecture; efficient methodology for mapping algorithms             onto two- or three-dimensional systolic arrays with feedbacks,                  replicated data, general timing, and limited or full broadcasting and           other architectural constraints; design of macropipelines of systolic           arrays and the related problems in interconnection, buffering, timing,          and closure property; and design of macropipelines of systolic arrays           for image processing and pattern recognition.  Emphasis is on both              theoretical and practical approaches in this research.  With the theory         developed, an automated design tool is being implemented so that it can         be interfaced with existing VLSI design tools.
{'FirstName': 'Jose', 'LastName': 'Fortes', 'PI_MID_INIT': 'A', 'PI_SUFX_NAME': None, 'PI_FULL_NAME': 'Jose A Fortes', 'EmailAddress': 'fortes@ufl.edu', 'NSF_ID': '000415025', 'StartDate': '09/15/1985', 'EndDate': None, 'RoleCode': 'Principal Investigator'}
{'Name': 'Purdue University', 'CityName': 'WEST LAFAYETTE', 'ZipCode': '479061332', 'PhoneNumber': '7654941055', 'StreetAddress': '2550 NORTHWESTERN AVE # 1100', 'StreetAddress2': None, 'CountryName': 'United States', 'StateName': 'Indiana', 'StateCode': 'IN', 'CONGRESSDISTRICT': '04', 'CONGRESS_DISTRICT_ORG': 'IN04', 'ORG_UEI_NUM': 'YRXVL4JYCEF5', 'ORG_LGL_BUS_NAME': 'PURDUE UNIVERSITY', 'ORG_PRNT_UEI_NUM': None}
{'Name': 'Purdue Research Foundation', 'CityName': 'WEST LAFAYETTE', 'StateCode': 'IN', 'ZipCode': '479064353', 'StreetAddress': '1281 WIN HENTSCHEL BLVD STE 2500', 'CountryCode': 'US', 'CountryName': 'United States', 'StateName': 'Indiana', 'CountryFlag': '1', 'CONGRESSDISTRICT': '04', 'CONGRESS_DISTRICT_PERF': 'IN04'}
[{'Code': '1475', 'Text': 'COMPUTER SYSTEMS ARCHITECTURE'}, {'Code': '4715', 'Text': 'COMPUTER SYSTEMS ARCHITECTURE'}, {'Code': '9115', 'Text': 'AUTOMATION'}]
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