VLSI (Very Large-Scale Integrated):  Models, Computation andAlgorithms
{'Code': '05010600', 'Directorate': {'Abbreviation': 'CSE', 'LongName': 'Direct For Computer & Info Scie & Enginr'}, 'Division': {'Abbreviation': 'CCF', 'LongName': 'Division of Computing and Communication Foundations'}}
{'SignBlockName': 'Robert B Grafton', 'PO_EMAI': None, 'PO_PHON': None}
The principal investigator's approach is to develop and study                   mathematical models of typical VLSI/ULSI design problems, including             array compaction and circuit layout problems.  Predictions of the new           models will be checked with real design data and problems.  Professor           Hu's approach is to concentrate on three topics:                                                                                                                (1)  Find new graph models of VLSI/ULSI design problems and from them           develop heuristic algorithms with error bounds which give performance           analysis.  Previous graph models the principal investigator has                 developed can be generalized to design problems and he will develop             linear heuristic algorithms with error bounds.                                                                                                                  (2)  Find advanced mathematical programming techniques that can achieve         circuit layouts that meet any of a variety of optimization criteria.                                                                                            (3)  Study a special class of geometric programming problems where              optimum solutions are integers, or are approximated with bounded error,         by integer solutions.  This approach will rely on a powerful                    mathematical assumption called the uniform smoothness assumption which          permits a divide-and-conquer approach to design algorithms and an               associated analysis.                                                            This research addresses the need to produce rapidly successful layouts          of very and ultra large-scale integrated (VLSI/ULSI) circuits.  It is a         need that has become of paramount importance as such devices become             increasingly complex and the industry more competitive.  There are many         approaches to problems in VLSI/ULSI design; however they suffer from one        of two problems.  Either the design methods are heuristic and can fail          unexpectedly because analysis methods are not well developed; or formal         algorithms, which are well understood, take too much time when very             large circuits are involved.  The basic need is for more realistic and          sophisticated models of computation and new analysis methods that will          lead to efficient VLSI/ULSI design methods.  The principal investigator         will bring to bear his excellent theoretical and mathematical background        to the solution of these problems.
{'FirstName': 'Te Chiang', 'LastName': 'Hu', 'PI_MID_INIT': None, 'PI_SUFX_NAME': None, 'PI_FULL_NAME': 'Te Chiang Hu', 'EmailAddress': 'hu@cs.ucsd.edu', 'NSF_ID': '000178200', 'StartDate': '07/01/1987', 'EndDate': None, 'RoleCode': 'Principal Investigator'}
{'Name': 'University of California-San Diego', 'CityName': 'LA JOLLA', 'ZipCode': '920930021', 'PhoneNumber': '8585344896', 'StreetAddress': '9500 GILMAN DR', 'StreetAddress2': None, 'CountryName': 'United States', 'StateName': 'California', 'StateCode': 'CA', 'CONGRESSDISTRICT': '50', 'CONGRESS_DISTRICT_ORG': 'CA50', 'ORG_UEI_NUM': 'UYTTZT6G9DT1', 'ORG_LGL_BUS_NAME': 'UNIVERSITY OF CALIFORNIA, SAN DIEGO', 'ORG_PRNT_UEI_NUM': None}
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{'Code': '4710', 'Text': 'DES AUTO FOR MICRO & NANO SYS'}
{'url': 'https://www.nsf.gov/awardsearch/download?DownloadFileName=1987&All=true', 'xml': '8700767.xml'}