EIA: Lithography for All-Vacuum Integrated Circuit               Fabrication
{'Code': '07010000', 'Directorate': {'Abbreviation': 'ENG', 'LongName': 'Directorate For Engineering'}, 'Division': {'Abbreviation': 'ECCS', 'LongName': 'Div Of Electrical, Commun & Cyber Sys'}}
{'SignBlockName': 'Cassandra Queen', 'PO_EMAI': 'cqueen@nsf.gov', 'PO_PHON': '7032925383'}
Integrated circuit fabrication is still widely carried out by           transporting the substrates between individual pieces of equipment in a         "cleanroom" environment.  Since it is impossible to fully control the           contaminant content of the air, there is ample opportunity for                  particulates or vapors to impinge on the materials being processed,             thereby altering device characteristics and reducing product yield.  A          complete fabrication process, including product transfer, carried out           under vacuum would result in a significant reduction of substrate               contamination.  Many process steps may be carried out under vacuum or at        reduced pressure but one critical operation, namely lithography, may            not. This is currently a barrier to the realization of all-vacuum               processing. The objective of this program is to investigate As-S/Ag             resist system deposition, exposure (optical and electron-beam), develop,        and strip, under vacuum conditions to create a lithographical process           which may ultimately be used in all-vacuum applications.  Extensive             microfabrication facilities will be used including equipment for                evaporation and sputtering, direct step on wafer and contact exposure,          high resolution e-beam lithography, parallel plate and reactive ion             etching, and materials analysis by EDXA, WDS, and AES.  The resulting           high resolution process will be compatible with multiple exposure               methods under vacuum and will allow considerable progress to be made in         all-vacuum processing.
{'FirstName': 'Michael', 'LastName': 'Kozicki', 'PI_MID_INIT': 'N', 'PI_SUFX_NAME': None, 'PI_FULL_NAME': 'Michael N Kozicki', 'EmailAddress': 'michael.kozicki@asu.edu', 'NSF_ID': '000485643', 'StartDate': '06/01/1987', 'EndDate': None, 'RoleCode': 'Principal Investigator'}
{'Name': 'Arizona State University', 'CityName': 'TEMPE', 'ZipCode': '852813670', 'PhoneNumber': '4809655479', 'StreetAddress': '660 S MILL AVENUE STE 204', 'StreetAddress2': None, 'CountryName': 'United States', 'StateName': 'Arizona', 'StateCode': 'AZ', 'CONGRESSDISTRICT': '04', 'CONGRESS_DISTRICT_ORG': 'AZ04', 'ORG_UEI_NUM': 'NTLHJXM55KZ6', 'ORG_LGL_BUS_NAME': 'ARIZONA STATE UNIVERSITY', 'ORG_PRNT_UEI_NUM': None}
{'Name': None, 'CityName': None, 'StateCode': None, 'ZipCode': None, 'StreetAddress': None, 'CountryCode': None, 'CountryName': None, 'StateName': None, 'CountryFlag': None, 'CONGRESSDISTRICT': None, 'CONGRESS_DISTRICT_PERF': '""'}
{'Code': '145600', 'Text': 'SOLID-STATE&MICROSTRUCTURE RES'}
{'url': 'https://www.nsf.gov/awardsearch/download?DownloadFileName=1987&All=true', 'xml': '8707089.xml'}