Presidential Young Investigator Award:  Research in Design  Automation
{'Code': '05010600', 'Directorate': {'Abbreviation': 'CSE', 'LongName': 'Direct For Computer & Info Scie & Enginr'}, 'Division': {'Abbreviation': 'CCF', 'LongName': 'Division of Computing and Communication Foundations'}}
{'SignBlockName': 'Robert B Grafton', 'PO_EMAI': None, 'PO_PHON': None}
This study aims to investigate techniques for verifying or gaining              confidence in the correctness of logical descriptions of digital                circuits.  The approach is based on verifying the correspondence                between a logic diagram and a register-transfer level description by            means of symbolic simulation, or some mixture of symbolic and actual            simulation.  The study implements such a verification system (probably          on a LISP-based workstation) and then evaluates algorithms for the              various tasks that it entails (such as logic minimization).  Research           continues on routing of integrated circuits when certain routing layers         are strongly preferred over others.
{'FirstName': 'Kenneth', 'LastName': 'Supowit', 'PI_MID_INIT': 'J', 'PI_SUFX_NAME': None, 'PI_FULL_NAME': 'Kenneth J Supowit', 'EmailAddress': None, 'NSF_ID': '000270264', 'StartDate': '09/01/1985', 'EndDate': None, 'RoleCode': 'Principal Investigator'}
{'Name': 'Princeton University', 'CityName': 'PRINCETON', 'ZipCode': '085442001', 'PhoneNumber': '6092583090', 'StreetAddress': '1 NASSAU HALL', 'StreetAddress2': None, 'CountryName': 'United States', 'StateName': 'New Jersey', 'StateCode': 'NJ', 'CONGRESSDISTRICT': '12', 'CONGRESS_DISTRICT_ORG': 'NJ12', 'ORG_UEI_NUM': 'NJ1YPQXQG7U5', 'ORG_LGL_BUS_NAME': 'THE TRUSTEES OF PRINCETON UNIVERSITY', 'ORG_PRNT_UEI_NUM': None}
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[{'Code': '1457', 'Text': 'COMPUTER ENGINEERING (OTHER)'}, {'Code': '1475', 'Text': 'COMPUTER SYSTEMS ARCHITECTURE'}]
{'url': 'https://www.nsf.gov/awardsearch/download?DownloadFileName=1984&All=true', 'xml': '8451214.xml'}