Presidential Young Investigator Award:  Computer Aided      Design
{'Code': '07030000', 'Directorate': {'Abbreviation': 'ENG', 'LongName': 'Directorate For Engineering'}, 'Division': {'Abbreviation': 'CMMI', 'LongName': 'Div Of Civil, Mechanical, & Manufact Inn'}}
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This research is concerned with statistically based computer-aided              design and manufacturing of VLSI processes and circuits.  Due to the            complexity of VLSI circuits, the design cycle must contain a design             verification feedback loop.  In a fully automated design system (e.g.,          silicon compilers), several verification tools (e.g. design rule                checking, logic simulation) may be unnecessary because the system               produces correct designs.  However, there exists a need for IC                  performance evaluation prior to IC manufacturing.  Circuit simulation           is the most powerful and widely used technique for performance                  verification.  The accuracy of such a verification depends strongly on          the accuracy of the device model parameters used in the simulation.             These model parameters can be determined by a process simulator which           contains physical models of the IC fabrication process steps and                semiconductor devices.  The objective of the research is to develop             efficient techniques for process/device simulation and apply them to a          number of design tasks such as nominal design, worst-case design and            statistical design.
{'FirstName': 'Andrzej', 'LastName': 'Strojwas', 'PI_MID_INIT': 'J', 'PI_SUFX_NAME': None, 'PI_FULL_NAME': 'Andrzej J Strojwas', 'EmailAddress': 'ajs@ece.cmu.edu', 'NSF_ID': '000209815', 'StartDate': '08/01/1986', 'EndDate': None, 'RoleCode': 'Principal Investigator'}
{'Name': 'Carnegie-Mellon University', 'CityName': 'PITTSBURGH', 'ZipCode': '152133815', 'PhoneNumber': '4122688746', 'StreetAddress': '5000 FORBES AVE', 'StreetAddress2': None, 'CountryName': 'United States', 'StateName': 'Pennsylvania', 'StateCode': 'PA', 'CONGRESSDISTRICT': '18', 'CONGRESS_DISTRICT_ORG': 'PA18', 'ORG_UEI_NUM': 'U3NKNFLNQ613', 'ORG_LGL_BUS_NAME': 'CARNEGIE MELLON UNIVERSITY', 'ORG_PRNT_UEI_NUM': 'U3NKNFLNQ613'}
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{'Code': '1463', 'Text': 'INTEGRATION ENGINEERING'}
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