Minimal Full-Access Interconnection Networks for Parallel   Processing
{'Code': '05050201', 'Directorate': {'Abbreviation': 'CSE', 'LongName': 'Direct For Computer & Info Scie & Enginr'}, 'Division': {'Abbreviation': 'CNS', 'LongName': 'Division Of Computer and Network Systems'}}
{'SignBlockName': 'Dwight D. Fisher', 'PO_EMAI': None, 'PO_PHON': None}
With the advent of low-cost microcomputers, it is now                      feasible to construct networks for interconnecting many processor               and memories to achieve higher speed of computation.  In this                   research project, the principal investigator (PI) will study                    tightly-coupled processors interconnected using a dynamic                       interconnection network.                                                             In very general terms, the problem is to provide a means of                interconnecting a collection of processing elements so that any                 two processing elements can obtain a direct communication path.                 This will allow dynamic reconfigurations.  The PI proposes to                   study the class of interconnection networks that provide full                   access (i.e., the ability for every input to access every output)               using the fewest possible number of stages--networks which the PI               refers to as "minimal full-access" (MFA).                                            The following are expected research results:                                 o  Characterizations of structural properties of MFA networks.                  o  Results on the set of permutations realizable by particular                     subclasses of MFA networks and how the results compare to                       permutations realizable by other classes of networks.                        o  Efficient algorithms for routing MFA networks.                               o  Techniques for allowing dynamic reconfigurations of one                         network into another better suited for applications at hand.                 o  Simple modifications of the networks studied, to allow for                      increased fault tolerance.                                                   o  Algorithms for deciding structural and functional                               equivalence of networks.                                                        This work is expected to produce new classes of networks, as               well as provide a basis for an underlying theory of all                         interconnection networks.  It is also expected to impact the                    (d,k) graph problem and the solution of certain matrix equations.
{'FirstName': 'M', 'LastName': 'Sridhar', 'PI_MID_INIT': 'A', 'PI_SUFX_NAME': None, 'PI_FULL_NAME': 'M A Sridhar', 'EmailAddress': None, 'NSF_ID': '000336204', 'StartDate': '09/15/1987', 'EndDate': None, 'RoleCode': 'Principal Investigator'}
{'Name': 'University of South Carolina at Columbia', 'CityName': 'COLUMBIA', 'ZipCode': '292083403', 'PhoneNumber': '8037777093', 'StreetAddress': '1600 HAMPTON ST', 'StreetAddress2': None, 'CountryName': 'United States', 'StateName': 'South Carolina', 'StateCode': 'SC', 'CONGRESSDISTRICT': '06', 'CONGRESS_DISTRICT_ORG': 'SC06', 'ORG_UEI_NUM': 'J22LNTMEDP73', 'ORG_LGL_BUS_NAME': 'UNIVERSITY OF SOUTH CAROLINA', 'ORG_PRNT_UEI_NUM': 'J22LNTMEDP73'}
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[{'Code': '4097', 'Text': 'NETWORKING RESEARCH'}, {'Code': '9145', 'Text': 'SPECIAL PROGRAMS-RESERVE'}]
{'url': 'https://www.nsf.gov/awardsearch/download?DownloadFileName=1987&All=true', 'xml': '8706350.xml'}