On most non-x86 architectures, explicit memory barrier instructions or atomic instructions (as in the example) must be used, or there may be special "unlock" instructions (as on IA-64) which provide the needed memory ordering.
Explicit memory barrier instructions must be used. This was on most non-x86 architectures. Atomic instructions (as in the example) must be used. This was on most non-x86 architectures. There may be special "unlock" instructions (as on IA-64). This is on most non-x86 architectures. These instructions (as on IA-64) provide the needed memory. This needed memory is ordering.