the fact that the fact that the electromechanicalness and the joggle happens is not true is not false.
sent1: if the seasonableness does not occur and the thrombosing Malacanthidae does not occur then the freemail does not occur. sent2: the IRA occurs if the broadcasting happens. sent3: if that the IRA does not occur and the broadcasting does not occur is not correct the fascistness occurs. sent4: the joggle happens. sent5: the telemetry does not occur. sent6: if the broadcasting does not occur then that the electromechanicalness happens is true. sent7: if the freemail does not occur the electromechanicalness does not occur and the joggle does not occur. sent8: the IRA does not occur.
void -> assump1: Let's assume that the broadcasting occurs.; sent2 & assump1 -> int1: the IRA happens.; int1 & sent8 -> int2: this is contradiction.; [assump1] & int2 -> int3: the broadcasting does not occur.; int3 & sent6 -> int4: the electromechanicalness happens.; int4 & sent4 -> hypothesis;
that the electromechanicalness happens and the joggle occurs is false.
 -> hypothesis;
$hypothesis$ = the fact that the fact that the electromechanicalness and the joggle happens is not true is not false. ; $context$ = sent1: if the seasonableness does not occur and the thrombosing Malacanthidae does not occur then the freemail does not occur. sent2: the IRA occurs if the broadcasting happens. sent3: if that the IRA does not occur and the broadcasting does not occur is not correct the fascistness occurs. sent4: the joggle happens. sent5: the telemetry does not occur. sent6: if the broadcasting does not occur then that the electromechanicalness happens is true. sent7: if the freemail does not occur the electromechanicalness does not occur and the joggle does not occur. sent8: the IRA does not occur. ; $proof$ = 
void -> assump1: Let's assume that the broadcasting occurs.; sent2 & assump1 -> int1: the IRA happens.; int1 & sent8 -> int2: this is contradiction.; [assump1] & int2 -> int3: the broadcasting does not occur.; int3 & sent6 -> int4: the electromechanicalness happens.; int4 & sent4 -> hypothesis; __DISPROVED__