either the gregariousness does not occur or the self-discipline does not occur or both.
sent1: that the amoebicness happens is prevented by that both the non-doubleness and the modeling happens. sent2: the gregariousness happens. sent3: that the defibrillation does not occur leads to that both the modeling and the doubleness happens. sent4: if the explosion does not occur then that either the gregariousness does not occur or the self-discipline does not occur or both is incorrect. sent5: the defibrillation does not occur. sent6: the modeling does not occur if both the explosion and the amoebicness occurs. sent7: the amoebicness happens.
void -> assump1: Let's assume that that the explosion occurs is correct.; assump1 & sent7 -> int1: the explosion and the amoebicness occurs.; int1 & sent6 -> int2: that the modeling does not occur hold.; sent3 & sent5 -> int3: both the modeling and the double occurs.; int3 -> int4: the modeling happens.; int2 & int4 -> int5: this is contradiction.; [assump1] & int5 -> int6: the explosion does not occur.; int6 & sent4 -> hypothesis;
the gregariousness does not occur and/or the self-discipline does not occur.
$hypothesis$ = either the gregariousness does not occur or the self-discipline does not occur or both. ; $context$ = sent1: that the amoebicness happens is prevented by that both the non-doubleness and the modeling happens. sent2: the gregariousness happens. sent3: that the defibrillation does not occur leads to that both the modeling and the doubleness happens. sent4: if the explosion does not occur then that either the gregariousness does not occur or the self-discipline does not occur or both is incorrect. sent5: the defibrillation does not occur. sent6: the modeling does not occur if both the explosion and the amoebicness occurs. sent7: the amoebicness happens. ; $proof$ = 
void -> assump1: Let's assume that that the explosion occurs is correct.; assump1 & sent7 -> int1: the explosion and the amoebicness occurs.; int1 & sent6 -> int2: that the modeling does not occur hold.; sent3 & sent5 -> int3: both the modeling and the double occurs.; int3 -> int4: the modeling happens.; int2 & int4 -> int5: this is contradiction.; [assump1] & int5 -> int6: the explosion does not occur.; int6 & sent4 -> hypothesis; __DISPROVED__