the fact that if the harmonization occurs then the armlessness occurs is false.
sent1: that the counterrevolution does not occur is triggered by that both the non-splenicness and the harmonization occurs. sent2: the splenicness does not occur if the apocynaceousness happens and the comedown happens. sent3: if the harmonization does not occur not the depression but the interleaving reliance happens. sent4: the armlessness occurs if that the counterrevolution does not occur is not wrong. sent5: that the apocynaceousness happens and the comedown does not occur is right. sent6: the splenicness is prevented by that the apocynaceousness happens but the comedown does not occur.
sent6 & sent5 -> int1: the splenicness does not occur.; void -> assump1: Let's assume that the harmonization occurs.; int1 & assump1 -> int2: both the non-splenicness and the harmonization happens.; sent1 & int2 -> int3: the counterrevolution does not occur.; sent4 & int3 -> int4: the armlessness happens.; [assump1] & int4 -> hypothesis;
the depression does not occur and the interleaving reliance occurs.
$hypothesis$ = the fact that if the harmonization occurs then the armlessness occurs is false. ; $context$ = sent1: that the counterrevolution does not occur is triggered by that both the non-splenicness and the harmonization occurs. sent2: the splenicness does not occur if the apocynaceousness happens and the comedown happens. sent3: if the harmonization does not occur not the depression but the interleaving reliance happens. sent4: the armlessness occurs if that the counterrevolution does not occur is not wrong. sent5: that the apocynaceousness happens and the comedown does not occur is right. sent6: the splenicness is prevented by that the apocynaceousness happens but the comedown does not occur. ; $proof$ = 
sent6 & sent5 -> int1: the splenicness does not occur.; void -> assump1: Let's assume that the harmonization occurs.; int1 & assump1 -> int2: both the non-splenicness and the harmonization happens.; sent1 & int2 -> int3: the counterrevolution does not occur.; sent4 & int3 -> int4: the armlessness happens.; [assump1] & int4 -> hypothesis; __DISPROVED__