The L2 cache, and higher-level caches, may be shared between the cores. It would be beneficial to allocate memory aligned to cache lines. This might be compensated by savings in instruction cache and memory and instruction decoding circuits. DMA can lead to cache coherency problems. Both the L2 cache and register file bandwidth have also doubled. It may also cache DNS records. This avoids the overhead of loading something into the cache without having any reuse. ETags may be flushable by clearing the browser cache (implementations vary). The modular architecture consists of multithreaded shared L2 cache and FlexFPU, which uses simultaneous multithreading. The TLB can be used as a fast lookup hardware cache. An opcode cache, Zend Opcache, is built into PHP since version 5.5. Level 4 cache which serves as a victim cache to the processors' Level 3 cache. It also contained support for an external cache of 16 to 64 kB. This compares to the higher end Conroe core which features 4 MB L2 Cache natively. This algorithm has demonstrated better performance on machines that benefit from cache optimization.