Various algorithms also exist to maintain cache coherency. This change propagation prevents the system from violating cache coherency. DMA can lead to cache coherency problems. RapidIO supports messaging, read/write and cache coherency semantics. Targets supporting cache coherency are also required to terminate bursts before they cross cache lines. A cache containing a coherency controller (snooper) is called a snoopy cache. The coherency matrix contains all second order statistical information about the polarization. This system coherency allows multiple processors to share memory and enables technology like ARM's big. Graphics Gems II discusses Hilbert curve coherency, and provides implementation. The maintenance of coherency thus affects the driving force for diffusion. For years afterward the regime failed to regain coherency and the mandate to administrate. Its other demands did not have a strong ideological coherency. In 2011, ARM Ltd proposed the AMBA 4 ACE for handling coherency in SoCs. A statistic defined analogously is the "bispectral coherency" or "bicoherence".