{"push_id":1684053616,"size":265,"distinct_size":33,"ref":"refs/heads/work/hns/input/tsc2007-v10","head":"0e3146ca8d68327f98b3359aae99bcc1e2713c50","before":"9179c33d2ebca488bfdba4de1f17679d24fee1cb","commits":[{"sha":"22048c5485503749754b3b5daf9d99ef89fcacdc","author":{"name":"Len Brown","email":"5d565dd5e9539f4ecdf383fcf3bb78b1a67861cb@intel.com"},"message":"tools/power turbostat: bugfix: GFXMHz column not changing\n\nturbostat displays a GFXMHz column, which comes from reading\n/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz\n\nBut GFXMHz was not changing, even when a manual\ncat /sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz\nshowed a new value.\n\nIt turns out that a rewind() on the open file is not sufficient,\nfflush() (or a close/open) is needed to read fresh values.\n\nReported-by: Yaroslav Isakov <yaroslav.isakov@gmail.com>\nSigned-off-by: Len Brown <len.brown@intel.com>","distinct":false,"url":"https://api.github.com/repos/goldelico/gta04-kernel/commits/22048c5485503749754b3b5daf9d99ef89fcacdc"},{"sha":"77f88796cee819b9c4562b0b6b44691b3b7755b1","author":{"name":"Tejun Heo","email":"e1d87360d7f4d7b7ebaddc11b54e50a559aaba57@kernel.org"},"message":"cgroup, kthread: close race window where new kthreads can be migrated to non-root cgroups\n\nCreation of a kthread goes through a couple interlocked stages between\nthe kthread itself and its creator.  Once the new kthread starts\nrunning, it initializes itself and wakes up the creator.  The creator\nthen can further configure the kthread and then let it start doing its\njob by waking it up.\n\nIn this configuration-by-creator stage, the creator is the only one\nthat can wake it up but the kthread is visible to userland.  When\naltering the kthread's attributes from userland is allowed, this is\nfine; however, for cases where CPU affinity is critical,\nkthread_bind() is used to first disable affinity changes from userland\nand then set the affinity.  This also prevents the kthread from being\nmigrated into non-root cgroups as that can affect the CPU affinity and\nmany other things.\n\nUnfortunately, the cgroup side of protection is racy.  While the\nPF_NO_SETAFFINITY flag prevents further migrations, userland can win\nthe race before the creator sets the flag with kthread_bind() and put\nthe kthread in a non-root cgroup, which can lead to all sorts of\nproblems including incorrect CPU affinity and starvation.\n\nThis bug got triggered by userland which periodically tries to migrate\nall processes in the root cpuset cgroup to a non-root one.  Per-cpu\nworkqueue workers got caught while being created and ended up with\nincorrected CPU affinity breaking concurrency management and sometimes\nstalling workqueue execution.\n\nThis patch adds task->no_cgroup_migration which disallows the task to\nbe migrated by userland.  kthreadd starts with the flag set making\nevery child kthread start in the root cgroup with migration\ndisallowed.  The flag is cleared after the kthread finishes\ninitialization by which time PF_NO_SETAFFINITY is set if the kthread\nshould stay in the root cgroup.\n\nIt'd be better to wait for the initialization instead of failing but I\ncouldn't think of a way of implementing that without adding either a\nnew PF flag, or sleeping and retrying from waiting side.  Even if\nuserland depends on changing cgroup membership of a kthread, it either\nhas to be synchronized with kthread_create() or periodically repeat,\nso it's unlikely that this would break anything.\n\nv2: Switch to a simpler implementation using a new task_struct bit\n    field suggested by Oleg.\n\nSigned-off-by: Tejun Heo <tj@kernel.org>\nSuggested-by: Oleg Nesterov <oleg@redhat.com>\nCc: Linus Torvalds <torvalds@linux-foundation.org>\nCc: Andrew Morton <akpm@linux-foundation.org>\nCc: Peter Zijlstra (Intel) <peterz@infradead.org>\nCc: Thomas Gleixner <tglx@linutronix.de>\nReported-and-debugged-by: Chris Mason <clm@fb.com>\nCc: stable@vger.kernel.org # v4.3+ (we can't close the race on < v4.3)\nSigned-off-by: Tejun Heo <tj@kernel.org>","distinct":false,"url":"https://api.github.com/repos/goldelico/gta04-kernel/commits/77f88796cee819b9c4562b0b6b44691b3b7755b1"},{"sha":"28787bf47b11b08290918dcf91b08764cb5fe122","author":{"name":"Quentin Schulz","email":"d8b6d84dc4895f5f7aa417a44cabc5d13c4bd844@free-electrons.com"},"message":"ARM: sun8i: a33: remove highest OPP to fix CPU crashes\n\nThe highest supported frequency (1.2GHz) requires to \"overvolt\" the CPU.\nHowever, some boards still do not have the cpu-supply DT property in the\ncpu DT node which means that the CPU will always run with the same input\nvoltage but try to run at 1.2GHz frequency. This is the source of\n(experienced) CPU crashes.\n\nRemove the OPP which requires overvolting the CPU until all boards have\na cpu-supply property.\n\nFixes: 03749eb88e63 (\"ARM: dts: sun8i: add opp-v2 table for A33\")\nSigned-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>\nSigned-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>","distinct":false,"url":"https://api.github.com/repos/goldelico/gta04-kernel/commits/28787bf47b11b08290918dcf91b08764cb5fe122"},{"sha":"ea33c2c2051a266f68d9cd920c789cec828c8f11","author":{"name":"Quentin Schulz","email":"d8b6d84dc4895f5f7aa417a44cabc5d13c4bd844@free-electrons.com"},"message":"ARM: sun8i: a33: add operating-points-v2 property to all nodes\n\nThe OPP are declared as shared but no operating points are declared for\ncpu1, 2 and 3. Thus, the following error happens during the boot:\n\ncpu cpu1: dev_pm_opp_of_get_sharing_cpus: Couldn't find tcpu_dev node.\n\nThis patch applies the operating points to each cpu of the A33.\n\nFixes: 03749eb88e63 (\"ARM: dts: sun8i: add opp-v2 table for A33\")\nSigned-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>\nAcked-by: Chen-Yu Tsai <wens@csie.org>\nSigned-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>","distinct":false,"url":"https://api.github.com/repos/goldelico/gta04-kernel/commits/ea33c2c2051a266f68d9cd920c789cec828c8f11"},{"sha":"06e1a5cc570703796ff1bd3a712e8e3b15c6bb0d","author":{"name":"Adam Ford","email":"aa72dba4e50831b0735b720704811f4d71d38f4f@gmail.com"},"message":"ARM: dts: OMAP3: Fix MFG ID EEPROM\n\nThe manufacturing information is stored in the EEPROM.  This chip\nis an AT24C64 not not (nor has it ever been) 24C02.  This patch will\ncorrectly address the EEPROM to read the entire contents and not just\n256 bytes (of 0xff).\n\nFixes: 5e3447a29a38 (\"ARM: dts: LogicPD Torpedo: Add AT24 EEPROM Support\")\n\nSigned-off-by: Adam Ford <aford173@gmail.com>\nSigned-off-by: Tony Lindgren <tony@atomide.com>","distinct":false,"url":"https://api.github.com/repos/goldelico/gta04-kernel/commits/06e1a5cc570703796ff1bd3a712e8e3b15c6bb0d"},{"sha":"ce2899428ec0249512023aecaa3530c29f775a4f","author":{"name":"Yegor Yefremov","email":"88e89abb77170136f1587d5ff6c9a180ace7fe54@googlemail.com"},"message":"ARM: dts: am335x-baltos: disable EEE for Atheros 8035 PHY\n\nThough cpsw doesn't support EEE feature, Atheros 8035 provides\nautomatic EEE support that is enabled by default. This causes\noccasional link drops when link partner also announces EEE support.\nThese link drops occur on both 100Mbit/s and 1000Mbit/s speeds.\nSo disable EEE advertising completely.\n\nSigned-off-by: Yegor Yefremov <yegorslists@googlemail.com>\nSigned-off-by: Tony Lindgren <tony@atomide.com>","distinct":false,"url":"https://api.github.com/repos/goldelico/gta04-kernel/commits/ce2899428ec0249512023aecaa3530c29f775a4f"},{"sha":"7d79f6098d82f8c09914d7799bc96891ad9c3baf","author":{"name":"Rob Herring","email":"b1c4db6d7090d3e65a0bb8b2af31f7af91ca5a05@kernel.org"},"message":"ARM: dts: ti: fix PCI bus dtc warnings\n\ndtc recently added PCI bus checks. Fix these warnings.\n\nSigned-off-by: Rob Herring <robh@kernel.org>\nCc: \"Benoît Cousson\" <bcousson@baylibre.com>\nCc: Tony Lindgren <tony@atomide.com>\nCc: linux-omap@vger.kernel.org\nSigned-off-by: Tony Lindgren <tony@atomide.com>","distinct":false,"url":"https://api.github.com/repos/goldelico/gta04-kernel/commits/7d79f6098d82f8c09914d7799bc96891ad9c3baf"},{"sha":"5659495a7a1455665ce1466d156597ad1bda8772","author":{"name":"Naohiro Aota","email":"1c611acbc8e9e609e80707e1f73d3a762c276260@elisp.net"},"message":"uapi: add missing install of userio.h\n\nWhile commit 5523662edd4f (\"Input: add userio module\") added userio.h\nunder the uapi/ directory, it forgot to add the header file to Kbuild.\nThus, the file was missing from header installation.\n\nSigned-off-by: Naohiro Aota <naota@elisp.net>\nReviewed-by: Lyude Paul <thatslyude@gmail.com>\nSigned-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>","distinct":false,"url":"https://api.github.com/repos/goldelico/gta04-kernel/commits/5659495a7a1455665ce1466d156597ad1bda8772"},{"sha":"9bcf53f34a2c1cebc45cc12e273dcd5f51fbc099","author":{"name":"Reizer, Eyal","email":"f2e894ee7a1a7a053b9bf89f1993271df1a1dbef@ti.com"},"message":"ARM: dts: am335x-evmsk: adjust mmc2 param to allow suspend\n\nmmc2 used for wl12xx was missing the keep-power-in suspend\nparameter. As a result the board couldn't reach suspend state.\n\nSigned-off-by: Eyal Reizer <eyalr@ti.com>\nSigned-off-by: Tony Lindgren <tony@atomide.com>","distinct":false,"url":"https://api.github.com/repos/goldelico/gta04-kernel/commits/9bcf53f34a2c1cebc45cc12e273dcd5f51fbc099"},{"sha":"351b7c490700747d1dba1b0a10fbfe3448d11c35","author":{"name":"Tony Lindgren","email":"59db37dd0a1458e16c2dffa797f972d03fa29423@atomide.com"},"message":"ARM: omap2+: Revert omap-smp.c changes resetting CPU1 during boot\n\nCommit 3251885285e1 (\"ARM: OMAP4+: Reset CPU1 properly for kexec\") started\nunconditionally resetting CPU1 because of a kexec boot issue I was seeing\nearlier on omap4 when doing kexec boot between two different kernel\nversions.\n\nThis caused issues on some systems. We should only reset CPU1 as a last\nresort option, and try to avoid it where possible. Doing an unconditional\nCPU1 reset causes issues for example when booting a bootloader configured\nsecure OS running on CPU1 as reported by Andrew F. Davis <afd@ti.com>.\n\nWe can't completely remove the reset of CPU1 as it would break kexec\nbooting from older kernels. But we can limit the CPU1 reset to cases\nwhere CPU1 is wrongly parked within the memory area used by the booting\nkernel. Then later on we can add support for parking CPU1 for kexec out\nof the SDRAM back to bootrom.\n\nSo let's first fix the regression reported by Andrew by making CPU1 reset\nconditional. To do this, we need to:\n\n1. Save configured AUX_CORE_BOOT_1 for later\n\n2. Modify AUX_CORE_BOOT_0 reading code to for HS SoCs to return\n   the whole register instead of the CPU mask\n\n3. Check if CPU1 is wrongly parked into the booting kernel by the\n   previous kernel and reset if needed\n\nFixes: 3251885285e1 (\"ARM: OMAP4+: Reset CPU1 properly for kexec\")\nReported-by: Andrew F. Davis <afd@ti.com>\nCc: Andrew F. Davis <afd@ti.com>\nCc: Keerthy <j-keerthy@ti.com>\nCc: Russell King <rmk+kernel@armlinux.org.uk>\nCc: Santosh Shilimkar <ssantosh@kernel.org>\nCc: Tero Kristo <t-kristo@ti.com>\nTested-by: Keerthy <j-keerthy@ti.com>\nTested-by: Andrew F. Davis <afd@ti.com>\nSigned-off-by: Tony Lindgren <tony@atomide.com>","distinct":false,"url":"https://api.github.com/repos/goldelico/gta04-kernel/commits/351b7c490700747d1dba1b0a10fbfe3448d11c35"},{"sha":"a431ecd2d459da3c91a612061f09eb422ffe78e2","author":{"name":"Tejun Heo","email":"e1d87360d7f4d7b7ebaddc11b54e50a559aaba57@kernel.org"},"message":"Revert \"pata_atiixp: Don't use unconnected secondary port on SB600/SB700\"\n\nThis reverts commit 5946fdaee4ba449e8fbb5d403e1ed69437f916e8.\n\nThe original commit's assumption that the secondary port is\nunconnected turns out to be false.\n\nSigned-off-by: Tejun Heo <tj@kernel.org>\nReported-by: Markku Pesonen <tourula@gmail.com>\nFixes: 5946fdaee4ba (\"pata_atiixp: Don't use unconnected secondary port on SB600/SB700\")\nCc: Darren Stevens <darren@stevens-zone.net>","distinct":false,"url":"https://api.github.com/repos/goldelico/gta04-kernel/commits/a431ecd2d459da3c91a612061f09eb422ffe78e2"},{"sha":"b03b99a329a14b7302f37c3ea6da3848db41c8c5","author":{"name":"Dan Williams","email":"11d4d1e92ac6a0e1ab4aaa72a56a5c1cae6b74af@intel.com"},"message":"acpi, nfit, libnvdimm: fix interleave set cookie calculation (64-bit comparison)\n\nWhile reviewing the -stable patch for commit 86ef58a4e35e \"nfit,\nlibnvdimm: fix interleave set cookie calculation\" Ben noted:\n\n    \"This is returning an int, thus it's effectively doing a 32-bit\n     comparison and not the 64-bit comparison you say is needed.\"\n\nUpdate the compare operation to be immune to this integer demotion problem.\n\nCc: <stable@vger.kernel.org>\nCc: Nicholas Moulin <nicholas.w.moulin@linux.intel.com>\nFixes: 86ef58a4e35e (\"nfit, libnvdimm: fix interleave set cookie calculation\")\nReported-by: Ben Hutchings <ben@decadent.org.uk>\nSigned-off-by: Dan Williams <dan.j.williams@intel.com>","distinct":false,"url":"https://api.github.com/repos/goldelico/gta04-kernel/commits/b03b99a329a14b7302f37c3ea6da3848db41c8c5"},{"sha":"9e1764309f577a88a0d5250fea6a080a6ad43556","author":{"name":"Chris Wilson","email":"4181b934c2715a2bba60cdb3cc1b35b2777d1c23@chris-wilson.co.uk"},"message":"drm/i915: Align \"unfenced\" tiled access on gen2, early gen3\n\nOld devices have quite severe restrictions for using fences, and unlike\nmore recent device (anything from Pineview onwards) we need to enforce\nthose restrictions even for unfenced tiled access from the render\npipeline.\n\nFixes: 944397f04f24 (\"drm/i915: Store required fence size/alignment for GGTT vma\")\nReported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>\nSigned-off-by: Chris Wilson <chris@chris-wilson.co.uk>\nCc: Ville Syrjälä <ville.syrjala@linux.intel.com>\nCc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>\nCc: <drm-intel-fixes@lists.freedesktop.org> # v4.11-rc1+\nLink: http://patchwork.freedesktop.org/patch/msgid/20170325113243.16438-1-chris@chris-wilson.co.uk\nReviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>\nReviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>\nTested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>\n(cherry picked from commit f4ce766f28cd0efa0cb4d869a84905d573ef7e70)\nSigned-off-by: Jani Nikula <jani.nikula@intel.com>","distinct":false,"url":"https://api.github.com/repos/goldelico/gta04-kernel/commits/9e1764309f577a88a0d5250fea6a080a6ad43556"},{"sha":"4e5f713ffc202c49a4374897cb0d2b218b391ff7","author":{"name":"Matthew Auld","email":"9397e7e420dd457edf6ec75683b6d8413aa71556@intel.com"},"message":"drm/i915/perf: destroy stream on sample_flags mismatch\n\nIf we were to ever encounter a sample_flags mismatch we need to ensure\nwe destroy the stream when we bail.\n\nFixes: d79651522e89 (\"drm/i915: Enable i915 perf stream for Haswell OA unit\")\nSigned-off-by: Matthew Auld <matthew.auld@intel.com>\nCc: Robert Bragg <robert@sixbynine.org>\nReviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>\nLink: http://patchwork.freedesktop.org/patch/msgid/20170327203459.18398-1-matthew.auld@intel.com\n(cherry picked from commit 22f880ca8246c6c80c4f48731c6a7d5d15042f56)\nSigned-off-by: Jani Nikula <jani.nikula@intel.com>","distinct":false,"url":"https://api.github.com/repos/goldelico/gta04-kernel/commits/4e5f713ffc202c49a4374897cb0d2b218b391ff7"},{"sha":"aa62acfd63e7367872291c15290cb9c29d140926","author":{"name":"Matthew Auld","email":"9397e7e420dd457edf6ec75683b6d8413aa71556@intel.com"},"message":"drm/i915/perf: remove user triggerable warn\n\nDon't throw a warning if we are given an invalid property id. While\nhere let's also bring back Robert' original idea of catching unhandled\nenumeration values at compile time.\n\nFixes: eec688e1420d (\"drm/i915: Add i915 perf infrastructure\")\nSigned-off-by: Matthew Auld <matthew.auld@intel.com>\nCc: Robert Bragg <robert@sixbynine.org>\nReviewed-by: Robert Bragg <robert@sixbynine.org>\nSigned-off-by: Mika Kuoppala <mika.kuoppala@intel.com>\nLink: http://patchwork.freedesktop.org/patch/msgid/20170327203236.18276-1-matthew.auld@intel.com\n(cherry picked from commit 0a309f9e3dfaa4f5db0bf1b0cab54571744b491a)\nSigned-off-by: Jani Nikula <jani.nikula@intel.com>","distinct":false,"url":"https://api.github.com/repos/goldelico/gta04-kernel/commits/aa62acfd63e7367872291c15290cb9c29d140926"},{"sha":"dd68f2ba0720e76c3a5bfa3f639c546f926792f5","author":{"name":"Chris Wilson","email":"4181b934c2715a2bba60cdb3cc1b35b2777d1c23@chris-wilson.co.uk"},"message":"drm/i915/execlists: Wrap tail pointer after reset tweaking\n\nIf the request->wa_tail is 0 (because it landed exactly on the end of\nthe ringbuffer), when we reconstruct request->tail following a reset we\nfill in an illegal value (-8 or 0x001ffff8). As a result, RING_HEAD is\nnever able to catch up with RING_TAIL and the GPU spins endlessly. If\nthe ring contains a couple of breadcrumbs, even our hangcheck is unable\nto catch the busy-looping as the ACTHD and seqno continually advance.\n\nv2: Move the wrap into a common intel_ring_wrap().\n\nFixes: a3aabe86a340 (\"drm/i915/execlists: Reinitialise context image after GPU hang\")\nSigned-off-by: Chris Wilson <chris@chris-wilson.co.uk>\nCc: Mika Kuoppala <mika.kuoppala@intel.com>\nCc: <stable@vger.kernel.org> # v4.10+\nLink: http://patchwork.freedesktop.org/patch/msgid/20170327130009.4678-1-chris@chris-wilson.co.uk\nReviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>\n(cherry picked from commit 450362d3fe866b14304f309b5fffba0c33fbfbc3)\nSigned-off-by: Jani Nikula <jani.nikula@intel.com>\nLink: http://patchwork.freedesktop.org/patch/msgid/20170329121315.1290-1-chris@chris-wilson.co.uk","distinct":false,"url":"https://api.github.com/repos/goldelico/gta04-kernel/commits/dd68f2ba0720e76c3a5bfa3f639c546f926792f5"},{"sha":"b79c52aef3cdee903017c1e9834b53996d70010e","author":{"name":"Zhi Wang","email":"33c682c955b8b10145dc87cd97ce96f9e34662dc@intel.com"},"message":"drm/i915/gvt: Activate/de-activate vGPU in mdev ops.\n\nThis patch introduces two functions for activating/de-activating vGPU in\nmdev ops.\n\nA racing condition was found between virtual vblank emulation and KVGMT\nmdev release path. V-blank emulation will emulate and inject V-blank\ninterrupt for every active vGPU with holding gvt->lock, while in mdev\nrelease path, it will directly release hypervisor handle without changing\nvGPU status or taking gvt->lock, so a kernel oops is encountered when\nvblank emulation is injecting a interrupt with a invalid hypervisor\nhandle. (Reported by Terrence)\n\nTo solve this problem, we factor out vGPU activation/de-activation from\nvGPU creation/destruction path and let KVMGT mdev release ops de-activate\nthe vGPU before release hypervisor handle. Once a vGPU is de-activated,\nGVT-g will not emulate v-blank for it or touch the hypervisor handle.\n\nFixes: 659643f (\"drm/i915/gvt/kvmgt: add vfio/mdev support to KVMGT\")\nSigned-off-by: Zhi Wang <zhi.a.wang@intel.com>\nSigned-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>","distinct":false,"url":"https://api.github.com/repos/goldelico/gta04-kernel/commits/b79c52aef3cdee903017c1e9834b53996d70010e"},{"sha":"740372b76e7966604e0f4dd0de13135513024f0d","author":{"name":"Nicholas Bellinger","email":"79a5e6cd70ccff08412e5a88129ccc53c0a7b045@linux-iscsi.org"},"message":"tcmu: Allow cmd_time_out to be set to zero (disabled)\n\nThe new cmd_time_out configfs attribute for TCMU is allowed to\nbe disabled, so go ahead and drop the tcmu_cmd_time_out_store()\ncheck.\n\nReported-by: Mike Christie <mchristi@redhat.com>\nSigned-off-by: Nicholas Bellinger <nab@linux-iscsi.org>","distinct":false,"url":"https://api.github.com/repos/goldelico/gta04-kernel/commits/740372b76e7966604e0f4dd0de13135513024f0d"},{"sha":"afea03fcf3d5db8a968f4b97797b8b83ada0dba3","author":{"name":"Manish Narani","email":"b155c83229fe5d7040bdf7f15cd64897c91ce901@xilinx.com"},"message":"usb: gadget: Correct usb EP argument for BOT status request\n\nThis patch corrects the argument in usb_ep_free_request as it is\nmistakenly set to ep_out. It should be ep_in for status request.\n\nSigned-off-by: Manish Narani <mnarani@xilinx.com>\nAcked-by: Felipe Balbi <felipe.balbi@linux.intel.com>\nSigned-off-by: Nicholas Bellinger <nab@linux-iscsi.org>","distinct":false,"url":"https://api.github.com/repos/goldelico/gta04-kernel/commits/afea03fcf3d5db8a968f4b97797b8b83ada0dba3"},{"sha":"efb2ea770bb3b0f40007530bc8b0c22f36e1c5eb","author":{"name":"Nicholas Bellinger","email":"79a5e6cd70ccff08412e5a88129ccc53c0a7b045@linux-iscsi.org"},"message":"iscsi-target: Fix TMR reference leak during session shutdown\n\nThis patch fixes a iscsi-target specific TMR reference leak\nduring session shutdown, that could occur when a TMR was\nquiesced before the hand-off back to iscsi-target code\nvia transport_cmd_check_stop_to_fabric().\n\nThe reference leak happens because iscsit_free_cmd() was\nincorrectly skipping the final target_put_sess_cmd() for\nTMRs when transport_generic_free_cmd() returned zero because\nthe se_cmd->cmd_kref did not reach zero, due to the missing\nse_cmd assignment in original code.\n\nThe result was iscsi_cmd and it's associated se_cmd memory\nwould be freed once se_sess->sess_cmd_map where released,\nbut the associated se_tmr_req was leaked and remained part\nof se_device->dev_tmr_list.\n\nThis bug would manfiest itself as kernel paging request\nOOPsen in core_tmr_lun_reset(), when a left-over se_tmr_req\nattempted to dereference it's se_cmd pointer that had\nalready been released during normal session shutdown.\n\nTo address this bug, go ahead and treat ISCSI_OP_SCSI_CMD\nand ISCSI_OP_SCSI_TMFUNC the same when there is an extra\nse_cmd->cmd_kref to drop in iscsit_free_cmd(), and use\nop_scsi to signal __iscsit_free_cmd() when the former\nneeds to clear any further iscsi related I/O state.\n\nReported-by: Rob Millner <rlm@daterainc.com>\nCc: Rob Millner <rlm@daterainc.com>\nReported-by: Chu Yuan Lin <cyl@datera.io>\nCc: Chu Yuan Lin <cyl@datera.io>\nTested-by: Chu Yuan Lin <cyl@datera.io>\nCc: stable@vger.kernel.org # 3.10+\nSigned-off-by: Nicholas Bellinger <nab@linux-iscsi.org>","distinct":false,"url":"https://api.github.com/repos/goldelico/gta04-kernel/commits/efb2ea770bb3b0f40007530bc8b0c22f36e1c5eb"}]}
{"actor":{"display_login":"goldelico"}}