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EA_16BYTE : EA_8BYTE;\n-    insOpts  opt   = genGetSimdInsOpt(is16B, baseType);\n+    if (ins == INS_fcvtn)\n+    {\n+        getEmitter()->emitIns_R_R(INS_fcvtn, EA_8BYTE, targetReg, op1Reg);\n+        getEmitter()->emitIns_R_R(INS_fcvtn2, EA_8BYTE, targetReg, op2Reg);\n+    }\n+    else\n+    {\n+        insOpts opt  = INS_OPTS_NONE;\n+        insOpts opt2 = INS_OPTS_NONE;\n \n-    getEmitter()->emitIns_R_R(ins, attr, targetReg, op1Reg, opt);\n-    getEmitter()->emitIns_R_R(ins2, attr, targetReg, op2Reg, opt);\n+        // This is not the same as genGetSimdInsOpt()\n+        // Basetype is the soure operand type\n+        // However encoding is based on the destination operand type which is 1/2 the basetype.\n+        switch (baseType)\n+        {\n+            case TYP_ULONG:\n+            case TYP_LONG:\n+                opt  = INS_OPTS_2S;\n+                opt2 = INS_OPTS_4S;\n+                break;\n+            case TYP_UINT:\n+            case TYP_INT:\n+                opt  = INS_OPTS_4H;\n+                opt2 = INS_OPTS_8H;\n+                break;\n+            case TYP_CHAR:\n+            case TYP_SHORT:\n+                opt  = INS_OPTS_8B;\n+                opt2 = INS_OPTS_16B;\n+                break;\n+            default:\n+                assert(!\"Unsupported narrowing element type\");\n+                unreached();\n+        }\n+        getEmitter()->emitIns_R_R(INS_xtn, EA_8BYTE, targetReg, op1Reg, opt);\n+        getEmitter()->emitIns_R_R(INS_xtn2, EA_16BYTE, targetReg, op2Reg, opt2);\n+    }","path":"src/jit/codegenarm64.cpp","position":75,"original_position":75,"commit_id":"fa40347674863182afeec27b20b6086bb3175b2d","original_commit_id":"fa40347674863182afeec27b20b6086bb3175b2d","user":{"login":"sdmaclea","id":25674984,"avatar_url":"https://avatars3.githubusercontent.com/u/25674984?v=4","gravatar_id":"","url":"https://api.github.com/users/sdmaclea","html_url":"https://github.com/sdmaclea","followers_url":"https://api.github.com/users/sdmaclea/followers","following_url":"https://api.github.com/users/sdmaclea/following{/other_user}","gists_url":"https://api.github.com/users/sdmaclea/gists{/gist_id}","starred_url":"https://api.github.com/users/sdmaclea/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/sdmaclea/subscriptions","organizations_url":"https://api.github.com/users/sdmaclea/orgs","repos_url":"https://api.github.com/users/sdmaclea/repos","events_url":"https://api.github.com/users/sdmaclea/events{/privacy}","received_events_url":"https://api.github.com/users/sdmaclea/received_events","type":"User","site_admin":false},"body":"It how the `xtn2` instruction is defined.  Q=1 and it write high 8 bytes of target register leaving low 8 bytes intact.","created_at":"2017-11-06T22:13:06Z","updated_at":"2017-11-06T22:13:06Z","html_url":"https://github.com/dotnet/coreclr/pull/14887#discussion_r149219546","pull_request_url":"https://api.github.com/repos/dotnet/coreclr/pulls/14887","author_association":"MEMBER","_links":{"self":{"href":"https://api.github.com/repos/dotnet/coreclr/pulls/comments/149219546"},"html":{"href":"https://github.com/dotnet/coreclr/pull/14887#discussion_r149219546"},"pull_request":{"href":"https://api.github.com/repos/dotnet/coreclr/pulls/14887"}},"in_reply_to_id":149218686},"pull_request":{"url":"https://api.github.com/repos/dotnet/coreclr/pulls/14887","id":150954265,"html_url":"https://github.com/dotnet/coreclr/pull/14887","diff_url":"https://github.com/dotnet/coreclr/pull/14887.diff","patch_url":"https://github.com/dotnet/coreclr/pull/14887.patch","issue_url":"https://api.github.com/repos/dotnet/coreclr/issues/14887","number":14887,"state":"open","locked":false,"title":"[Arm64] genSIMDIntrinsicNarrow/Widen","user":{"login":"sdmaclea","id":25674984,"avatar_url":"https://avatars3.githubusercontent.com/u/25674984?v=4","gravatar_id":"","url":"https://api.github.com/users/sdmaclea","html_url":"https://github.com/sdmaclea","followers_url":"https://api.github.com/users/sdmaclea/followers","following_url":"https://api.github.com/users/sdmaclea/following{/other_user}","gists_url":"https://api.github.com/users/sdmaclea/gists{/gist_id}","starred_url":"https://api.github.com/users/sdmaclea/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/sdmaclea/subscriptions","organizations_url":"https://api.github.com/users/sdmaclea/orgs","repos_url":"https://api.github.com/users/sdmaclea/repos","events_url":"https://api.github.com/users/sdmaclea/events{/privacy}","received_events_url":"https://api.github.com/users/sdmaclea/received_events","type":"User","site_admin":false},"body":"@dotnet/jit-contrib @dotnet/arm64-contrib PTAL","created_at":"2017-11-06T20:43:20Z","updated_at":"2017-11-06T22:13:06Z","closed_at":null,"merged_at":null,"merge_commit_sha":"0ec8cbf3bdf340441d92e77887043aa545af63cd","assignee":null,"assignees":[],"requested_reviewers":[],"milestone":null,"commits_url":"https://api.github.com/repos/dotnet/coreclr/pulls/14887/commits","review_comments_url":"https://api.github.com/repos/dotnet/coreclr/pulls/14887/comments","review_comment_url":"https://api.github.com/repos/dotnet/coreclr/pulls/comments{/number}","comments_url":"https://api.github.com/repos/dotnet/coreclr/issues/14887/comments","statuses_url":"https://api.github.com/repos/dotnet/coreclr/statuses/fa40347674863182afeec27b20b6086bb3175b2d","head":{"label":"sdmaclea:PR-ARM64-genSIMDIntrinsicNarrow-Widen","ref":"PR-ARM64-genSIMDIntrinsicNarrow-Widen","sha":"fa40347674863182afeec27b20b6086bb3175b2d","user":{"login":"sdmaclea","id":25674984,"avatar_url":"https://avatars3.githubusercontent.com/u/25674984?v=4","gravatar_id":"","url":"https://api.github.com/users/sdmaclea","html_url":"https://github.com/sdmaclea","followers_url":"https://api.github.com/users/sdmaclea/followers","following_url":"https://api.github.com/users/sdmaclea/following{/other_user}","gists_url":"https://api.github.com/users/sdmaclea/gists{/gist_id}","starred_url":"https://api.github.com/users/sdmaclea/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/sdmaclea/subscriptions","organizations_url":"https://api.github.com/users/sdmaclea/orgs","repos_url":"https://api.github.com/users/sdmaclea/repos","events_url":"https://api.github.com/users/sdmaclea/events{/privacy}","received_events_url":"https://api.github.com/users/sdmaclea/received_events","type":"User","site_admin":false},"repo":{"id":81508412,"name":"coreclr","full_name":"sdmaclea/coreclr","owner":{"login":"sdmaclea","id":25674984,"avatar_url":"https://avatars3.githubusercontent.com/u/25674984?v=4","gravatar_id":"","url":"https://api.github.com/users/sdmaclea","html_url":"https://github.com/sdmaclea","followers_url":"https://api.github.com/users/sdmaclea/followers","following_url":"https://api.github.com/users/sdmaclea/following{/other_user}","gists_url":"https://api.github.com/users/sdmaclea/gists{/gist_id}","starred_url":"https://api.github.com/users/sdmaclea/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/sdmaclea/subscriptions","organizations_url":"https://api.github.com/users/sdmaclea/orgs","repos_url":"https://api.github.com/users/sdmaclea/repos","events_url":"https://api.github.com/users/sdmaclea/events{/privacy}","received_events_url":"https://api.github.com/users/sdmaclea/received_events","type":"User","site_admin":false},"private":false,"html_url":"https://github.com/sdmaclea/coreclr","description":"This repo contains the .NET Core runtime, called CoreCLR, and the base library, called mscorlib. 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