{"push_id":2065748391,"size":78,"distinct_size":78,"ref":"refs/heads/jenkins","head":"65ccee2dc2d1408765a93f92df81f4f383a23c47","before":"f59fc6f4f57505e8479cae77e5119a74485c7af2","commits":[{"sha":"3d112a7cd49656da3dde5f9b476b6ddc2d984528","author":{"name":"Kenneth Graunke","email":"e8e0e12ced052a7b04539107b6dfbe9787d38bd2@whitecape.org"},"message":"i965: Move fs_inst::has_side_effects()'s eot check to the parent class.\n\nThis eliminates a layer of wrapping, and makes a backend_instruction\nsufficient.  The downside is that it exposes 'eot' to the vec4 backend,\nwhich it doesn't need, but can basically happily ignore.\n\nReviewed-by: Matt Turner <mattst88@gmail.com>\nTested-by: Pallavi G <pallavi.g@intel.com>","distinct":true,"url":"https://api.github.com/repos/pnmanolova/mesa/commits/3d112a7cd49656da3dde5f9b476b6ddc2d984528"},{"sha":"68f69ebdccca16246bafd86e86ed80fab369009b","author":{"name":"Kenneth Graunke","email":"e8e0e12ced052a7b04539107b6dfbe9787d38bd2@whitecape.org"},"message":"i965: Use is_scheduling_barrier instead of schedule_node::is_barrier.\n\nCommit a73116ecc60414ade89802150b tried to make add_barrier_deps()\nwalk to the next barrier, and stop.  To accomplish that, it added an\nis_barrier flag.  Unfortunately, this only works half of the time.\n\nThe issue is that add_barrier_deps() walks both backward (to the\nprevious barrier), and forward (to the next barrier).  It also sets\nis_barrier.  Assuming that we're processing instructions in forward\norder, this means that is_barrier will be set for previous instructions,\nbut not future ones.  So we'll never see it, and walk further than we\nneed to.\n\ndEQP-GLES31.functional.ssbo.layout.random.all_shared_buffer.23\nnow compiles its shaders in 3.6 seconds instead of 3.3 minutes.\n\nReviewed-by: Matt Turner <mattst88@gmail.com>\nTested-by: Pallavi G <pallavi.g@intel.com>","distinct":true,"url":"https://api.github.com/repos/pnmanolova/mesa/commits/68f69ebdccca16246bafd86e86ed80fab369009b"},{"sha":"113a6a639fec88631411d4a53d8e68cdebe15865","author":{"name":"Kenneth Graunke","email":"e8e0e12ced052a7b04539107b6dfbe9787d38bd2@whitecape.org"},"message":"isl: Fix width check in isl_gen7_choose_msaa_layout.\n\nThe restriction is supposed to apply if the width *field* is >= 8192,\nmeaning the actual width *value* is >= 8193.\n\nThe code also incorrectly used == for some reason.\n\nReviewed-by: Juan A. Suarez Romero <jasuarez@igalia.com>\nReviewed-by: Jason Ekstrand <jason@jlekstrand.net>","distinct":true,"url":"https://api.github.com/repos/pnmanolova/mesa/commits/113a6a639fec88631411d4a53d8e68cdebe15865"},{"sha":"33bdbc1db47cffc9c8b79d7daee51fcdcb52837e","author":{"name":"Tim Rowley","email":"8f5e6de09de66e68b6e3e20be2b7771eb1beea5a@intel.com"},"message":"gallium: add more exceptions to tgsi_util_get_inst_usage_mask\n\nA number of double/int64 operations don't have matching\nread and write usage masks, which the fallthrough case of\ntgsi_util_get_inst_usage_mask assumes for componentwise\ntagged instructions.\n\nNo regressions in llvmpipe piglit; fixes a large number of\nswr regressions.\n\nReviewed-by: Roland Scheidegger <sroland@vmware.com>\nReviewed-by: Marek Olšák <marek.olsak@amd.com>","distinct":true,"url":"https://api.github.com/repos/pnmanolova/mesa/commits/33bdbc1db47cffc9c8b79d7daee51fcdcb52837e"},{"sha":"0954ce1000cb646cda8bad3918cc9bbdcbdbf88b","author":{"name":"Kenneth Graunke","email":"e8e0e12ced052a7b04539107b6dfbe9787d38bd2@whitecape.org"},"message":"i965: Make intel_miptree_prepare_texture() take level/layer arguments.\n\nThis effectively exports intel_miptree_prepare_texture_slices() as\nintel_miptree_prepare_texture().  The hope is to avoid resolves for\nwhen using texture views that access a subset of the levels/layers.\n\nFor now, we pass the same arguments to separate the mechanical change\nfrom the one that actually modifies our behavior.\n\nReviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>\nReviewed-by; Jason Ekstrand <jason@jlekstrand.net>","distinct":true,"url":"https://api.github.com/repos/pnmanolova/mesa/commits/0954ce1000cb646cda8bad3918cc9bbdcbdbf88b"},{"sha":"e208d7f8744819a0dfb8f717a7e175f41225ba83","author":{"name":"Kenneth Graunke","email":"e8e0e12ced052a7b04539107b6dfbe9787d38bd2@whitecape.org"},"message":"i965: Only resolve texture levels/layers that are accessed.\n\nThis should avoid unnecessary resolves when working with texture views.\n\nReviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>\nReviewed-by; Jason Ekstrand <jason@jlekstrand.net>","distinct":true,"url":"https://api.github.com/repos/pnmanolova/mesa/commits/e208d7f8744819a0dfb8f717a7e175f41225ba83"},{"sha":"fa6ca6991bccea97fbb98c29fb02e2a195818b8c","author":{"name":"Kenneth Graunke","email":"e8e0e12ced052a7b04539107b6dfbe9787d38bd2@whitecape.org"},"message":"i965: Remove the intel_miptree_prepare_fb_fetch wrapper.\n\nNow that intel_miptree_prepare_texture takes levels and layers, there's\nnot much use in this anymore.\n\nReviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>\nReviewed-by; Jason Ekstrand <jason@jlekstrand.net>","distinct":true,"url":"https://api.github.com/repos/pnmanolova/mesa/commits/fa6ca6991bccea97fbb98c29fb02e2a195818b8c"},{"sha":"82144b7392d1651167cbfd4746aea6a14d5aff46","author":{"name":"Kenneth Graunke","email":"e8e0e12ced052a7b04539107b6dfbe9787d38bd2@whitecape.org"},"message":"i965: Don't disable aux buffers for non-overlapping miplevels.\n\nMeta's GenerateMipmap implementation binds the same image for both\nsampling and rendering - but it samples from one miplevel while\nrendering the next.  This is a false self-dependency, and there's\nno need to disable auxiliary buffers in this case.  In fact, we really\nwant to leave it enabled so the new miplevels gain color compression.\n\nThankfully, the texture object's _MaxLevel is always one shy of the\nmiplevel being rendered.  So we can simply check if irb->mt_level is\noverlaps with the texture's defined levels.  If not, there's no self-\ndependency and we can leave the auxiliary buffers enabled.\n\nFixes a performance regression in GFXBench4 Car Chase, which apparently\ncalls glGenerateMipmap() on every frame.\n\nBugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103247\nReviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>\nReviewed-by; Jason Ekstrand <jason@jlekstrand.net>","distinct":true,"url":"https://api.github.com/repos/pnmanolova/mesa/commits/82144b7392d1651167cbfd4746aea6a14d5aff46"},{"sha":"ed1db803faf5f325b0d5928106e682a217b2a6f6","author":{"name":"Tim Rowley","email":"8f5e6de09de66e68b6e3e20be2b7771eb1beea5a@intel.com"},"message":"swr/rast: Minor changes for os-x\n\nReviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>","distinct":true,"url":"https://api.github.com/repos/pnmanolova/mesa/commits/ed1db803faf5f325b0d5928106e682a217b2a6f6"},{"sha":"62e2d657c868ee7c7ad6a24269c81a9827c66b8f","author":{"name":"Tim Rowley","email":"8f5e6de09de66e68b6e3e20be2b7771eb1beea5a@intel.com"},"message":"swr/rast: Miscellaneous viewport array code changes\n\nReviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>","distinct":true,"url":"https://api.github.com/repos/pnmanolova/mesa/commits/62e2d657c868ee7c7ad6a24269c81a9827c66b8f"},{"sha":"04ea03d99d8810a7df5aca059ff00c26ecaa71ee","author":{"name":"Tim Rowley","email":"8f5e6de09de66e68b6e3e20be2b7771eb1beea5a@intel.com"},"message":"swr/rast: Fix indentation\n\nReviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>","distinct":true,"url":"https://api.github.com/repos/pnmanolova/mesa/commits/04ea03d99d8810a7df5aca059ff00c26ecaa71ee"},{"sha":"49090ccf54798f7c9081f9b20d0ed0d0433ec026","author":{"name":"Tim Rowley","email":"8f5e6de09de66e68b6e3e20be2b7771eb1beea5a@intel.com"},"message":"swr/rast: Change DS memory allocation\n\nReviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>","distinct":true,"url":"https://api.github.com/repos/pnmanolova/mesa/commits/49090ccf54798f7c9081f9b20d0ed0d0433ec026"},{"sha":"2559f2b93edc74d943fa1441433288a92263f854","author":{"name":"Tim Rowley","email":"8f5e6de09de66e68b6e3e20be2b7771eb1beea5a@intel.com"},"message":"swr/rast: Widen fetch shader to SIMD16 (disabled for now)\n\nRefactored the gather operation to process 16 elements at a time via\npaired SIMD8 operations.\n\nReviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>","distinct":true,"url":"https://api.github.com/repos/pnmanolova/mesa/commits/2559f2b93edc74d943fa1441433288a92263f854"},{"sha":"028ffa5e1820707ef0cab52853e36a259b00c849","author":{"name":"Tim Rowley","email":"8f5e6de09de66e68b6e3e20be2b7771eb1beea5a@intel.com"},"message":"swr/rast: Add api to override draws in flight\n\nAllow draws in flight to be overridden via SWR_CREATECONTEXT_INFO.\n\nPatch by Jan Zielinski.\n\nReviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>","distinct":true,"url":"https://api.github.com/repos/pnmanolova/mesa/commits/028ffa5e1820707ef0cab52853e36a259b00c849"},{"sha":"bfda35c8dd4bc602a3b174377dfea92319438e2b","author":{"name":"Tim Rowley","email":"8f5e6de09de66e68b6e3e20be2b7771eb1beea5a@intel.com"},"message":"swr: knob overrides for Intel Xeon Phi\n\nArchitecture benefits from having more threads/work outstanding.\n\nPatch by Jan Zielinski.\n\nReviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>","distinct":true,"url":"https://api.github.com/repos/pnmanolova/mesa/commits/bfda35c8dd4bc602a3b174377dfea92319438e2b"},{"sha":"163a4bf3864fbe45ee44820c2fee08bea18bb3c6","author":{"name":"Bas Nieuwenhuizen","email":"99bb905c4f884bf38b04075a0f5da8a4fd0bd599@basnieuwenhuizen.nl"},"message":"ac: Parse the new HS RSRC1 register.\n\nReviewed-by: Dave Airlie <airlied@redhat.com>","distinct":true,"url":"https://api.github.com/repos/pnmanolova/mesa/commits/163a4bf3864fbe45ee44820c2fee08bea18bb3c6"},{"sha":"872b21487c9f4dee736586e309bb53155dc0e0ab","author":{"name":"Bas Nieuwenhuizen","email":"99bb905c4f884bf38b04075a0f5da8a4fd0bd599@basnieuwenhuizen.nl"},"message":"ac/nir: Add HS calling convention.\n\nNeeded for GFX9 merged shaders.\n\nReviewed-by: Dave Airlie <airlied@redhat.com>","distinct":true,"url":"https://api.github.com/repos/pnmanolova/mesa/commits/872b21487c9f4dee736586e309bb53155dc0e0ab"},{"sha":"a996ed1f9b84d6b2744bad6226d9b66a9c94d387","author":{"name":"Bas Nieuwenhuizen","email":"99bb905c4f884bf38b04075a0f5da8a4fd0bd599@basnieuwenhuizen.nl"},"message":"ac/nir: Change interface to allow multiple source shaders.\n\nReviewed-by: Dave Airlie <airlied@redhat.com>","distinct":true,"url":"https://api.github.com/repos/pnmanolova/mesa/commits/a996ed1f9b84d6b2744bad6226d9b66a9c94d387"},{"sha":"6078a3bd51c142749f34d51e0eb2cdc83c35dc01","author":{"name":"Bas Nieuwenhuizen","email":"99bb905c4f884bf38b04075a0f5da8a4fd0bd599@basnieuwenhuizen.nl"},"message":"ac/nir: Allow ac_shader_variant_info to contain info about multiple stages.\n\nReviewed-by: Dave Airlie <airlied@redhat.com>","distinct":true,"url":"https://api.github.com/repos/pnmanolova/mesa/commits/6078a3bd51c142749f34d51e0eb2cdc83c35dc01"},{"sha":"0cdc8b26f8bb30f2c41a2b70544348557ced348f","author":{"name":"Bas Nieuwenhuizen","email":"99bb905c4f884bf38b04075a0f5da8a4fd0bd599@basnieuwenhuizen.nl"},"message":"ac/nir: Make scan_shader_output_decl less dependent on the context.\n\nReviewed-by: Dave Airlie <airlied@redhat.com>","distinct":true,"url":"https://api.github.com/repos/pnmanolova/mesa/commits/0cdc8b26f8bb30f2c41a2b70544348557ced348f"}]}
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