{"push_id":2212634411,"size":87,"distinct_size":87,"ref":"refs/heads/master","head":"4c4436477d28621a0a3e4ddefe36b0bc95c36545","before":"c0ade050e0b8470f63a10a73d37f20eb3c3f10d7","commits":[{"sha":"86c67a98ff61fb314dba55c36275093d6651c200","author":{"name":"Craig Topper","email":"6a75d0b5116f69c017582fb3bf52b5bed0a243c0@intel.com"},"message":"[X86] Add an assert to indicate that there is only once specific VT allowed at a certain point in LowerMULH.\n\nHelps with code readability a little.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321118 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/ppenzin/llvm/commits/86c67a98ff61fb314dba55c36275093d6651c200"},{"sha":"0702d4c37c99138d7fec02f6b64338249d3b05b0","author":{"name":"Adrian McCarthy","email":"e1ba1805876857fd08e6673349d0117765fa82eb@google.com"},"message":"Fix faulty assertion in debug info\n\nIt appears the code uses nullptr to represent a void type in debug metadata,\nwhich led to an assertion failure when building DeltaAlgorithm.cpp with a\nself-hosted clang on Windows.\n\nI'm not sure why/if the problem was Windows-specific.\n\nFixes bug https://bugs.llvm.org/show_bug.cgi?id=35543\n\nDifferential Revision: https://reviews.llvm.org/D41264\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321122 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/ppenzin/llvm/commits/0702d4c37c99138d7fec02f6b64338249d3b05b0"},{"sha":"a6f3fb18681c5f225f0c38b1dd1c3cd2fa3c734f","author":{"name":"Adrian McCarthy","email":"e1ba1805876857fd08e6673349d0117765fa82eb@google.com"},"message":"Revert \"Fix faulty assertion in debug info\"\n\nThis reverts commit e32def3f7ebe1136b7038336eff56a415a962bf2.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321125 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/ppenzin/llvm/commits/a6f3fb18681c5f225f0c38b1dd1c3cd2fa3c734f"},{"sha":"d4598fc0c7abb834edf034dd556826787652301f","author":{"name":"Dan Gohman","email":"07f11c3480128839bcfb9bec9851b5985450fb0a@gmail.com"},"message":"[WebAssembly] Remove an obsolete comment.\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321127 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/ppenzin/llvm/commits/d4598fc0c7abb834edf034dd556826787652301f"},{"sha":"7dfcb2777b87aee491c31de48b1b989cb635e193","author":{"name":"Dan Gohman","email":"07f11c3480128839bcfb9bec9851b5985450fb0a@gmail.com"},"message":"[WebAssembly] Disable tee_local optimizations when targeting the ELF ABI.\n\nThese optimizations depend on the ExplicitLocals pass to lower TEE\ninstructions, which is disabled in the ELF ABI, so disable them too.\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321131 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/ppenzin/llvm/commits/7dfcb2777b87aee491c31de48b1b989cb635e193"},{"sha":"c6921cc7126ae28dd3a2e75d8535235189ed0f73","author":{"name":"Craig Topper","email":"6a75d0b5116f69c017582fb3bf52b5bed0a243c0@intel.com"},"message":"[X86] Remove code from combineSext that looks for MVT::i1 after operation legalization which can never happen.\n\nType legalization guarantees this to be impossible since MVT::i1 isn't a legal type.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321132 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/ppenzin/llvm/commits/c6921cc7126ae28dd3a2e75d8535235189ed0f73"},{"sha":"6725cd17f4838fe56afed17b925dd336923587a5","author":{"name":"Craig Topper","email":"6a75d0b5116f69c017582fb3bf52b5bed0a243c0@intel.com"},"message":"[X86] Fix probable typo in fma fneg test.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321136 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/ppenzin/llvm/commits/6725cd17f4838fe56afed17b925dd336923587a5"},{"sha":"81228ec56132601d7ce2f650bed027c8e727b7dc","author":{"name":"Craig Topper","email":"6a75d0b5116f69c017582fb3bf52b5bed0a243c0@intel.com"},"message":"[X86] Improve coverage of fma negations.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321137 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/ppenzin/llvm/commits/81228ec56132601d7ce2f650bed027c8e727b7dc"},{"sha":"06400502e2d6e764bef0ff1135a9478a928e98ce","author":{"name":"Dan Gohman","email":"07f11c3480128839bcfb9bec9851b5985450fb0a@gmail.com"},"message":"[memcpyopt] Teach memcpyopt to optimize across basic blocks\n\nThis teaches memcpyopt to make a non-local memdep query when a local query\nindicates that the dependency is non-local. This notably allows it to\neliminate many more llvm.memcpy calls in common Rust code, often by 20-30%.\n\nThis is r319482 and r319483, along with fixes for PR35519: fix the \noptimization that merges stores into memsets to preserve cached memdep\ninfo, and fix memdep's non-local caching strategy to not assume that larger\nqueries are always more conservative than smaller ones.\n\nFixes PR28958 and PR35519.\n\nDifferential Revision: https://reviews.llvm.org/D40802\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321138 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/ppenzin/llvm/commits/06400502e2d6e764bef0ff1135a9478a928e98ce"},{"sha":"feb947453af660e8488f8a1a9b49c325745d7738","author":{"name":"Hiroshi Inoue","email":"3e15e65404b975101e094443b1e5ff2d3461d1d4@jp.ibm.com"},"message":"[PowerPC] fix a bug in redundant compare elimination\n\nThis patch fixes a bug in the redundant compare elimination reported in https://reviews.llvm.org/rL320786 and re-enables the optimization.\n\nThe redundant compare elimination assumes that we can replace signed comparison with unsigned comparison for the equality check. But due to the difference in the sign extension behavior we cannot change the opcode if the comparison is against an immediate and the most significant bit of the immediate is one.\n\nDifferential Revision: https://reviews.llvm.org/D41385\n\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321147 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/ppenzin/llvm/commits/feb947453af660e8488f8a1a9b49c325745d7738"},{"sha":"ac89b1f14197143c7bb95510af1abd3896ce3963","author":{"name":"Craig Topper","email":"6a75d0b5116f69c017582fb3bf52b5bed0a243c0@intel.com"},"message":"[X86] Add a missing return to combineGatherScatter after sucessful combine.\n\nNot sure how to test this cause I think the worst that happens is that we don't revisit the node a second time to look for additional combines. We used UpdateNodeOperands so the updating the DAG work was already done.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321148 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/ppenzin/llvm/commits/ac89b1f14197143c7bb95510af1abd3896ce3963"},{"sha":"c8f103e52b297f3e3e0ed1756e11373c68af3566","author":{"name":"Martin Storsjo","email":"ea98e1d0a9a4d10e3af04e16be88050749615623@martin.st"},"message":"[AArch64] Implement stack probing for windows\n\nDifferential Revision: https://reviews.llvm.org/D41131\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321150 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/ppenzin/llvm/commits/c8f103e52b297f3e3e0ed1756e11373c68af3566"},{"sha":"15dc4d1db93cd30d784b160947dc7ff2e2f36181","author":{"name":"Craig Topper","email":"6a75d0b5116f69c017582fb3bf52b5bed0a243c0@intel.com"},"message":"[X86] Optimize sign extends on index operand to gather/scatter to not sign extend past i32.\n\nThe gather instruction will implicitly sign extend to the pointer width, we don't need to further extend it. This can prevent unnecessary splitting in some cases.\n\nThere's still an issue that lowering on non-VLX can introduce another sign extend that doesn't get combined with shifts from a lowered sign_extend_inreg.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321152 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/ppenzin/llvm/commits/15dc4d1db93cd30d784b160947dc7ff2e2f36181"},{"sha":"5942b047a5bee2c8934e6f1c22469cc883f8ebac","author":{"name":"Gadi Haber","email":"df16d6120ac2ede8a41d3a73ad5a3674ec4f63fd@intel.com"},"message":"[X86][CLFLUSH]: Adding full coverage of MC encoding for the CLFLUSH isa sets.<NFC>\n\nNFC.\nAdding MC regressions tests to cover the CLFLSH and CLFLUSHOPT isa sets.\nThis patch is part of a larger task to cover MC encoding of all X86 isa sets started in revision: https://reviews.llvm.org/D39952\n\nReviewers: zvi, RKSimon, craig.topper, m_zuckerman\nDifferential Revision: https://reviews.llvm.org/D41331\n\nChange-Id: Ifa643dd52f1b7184c52bc1806038dc74b234fc65\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321153 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/ppenzin/llvm/commits/5942b047a5bee2c8934e6f1c22469cc883f8ebac"},{"sha":"5eba494772fb9f74e8f7209de554da5bb2f75fa8","author":{"name":"Sam Parker","email":"1d454d7a6a3542abcdf7947ba28175898f1621d2@arm.com"},"message":"[AArch64] CCSIDR2 system register\n\nImplement the 'Current Cache Size' register that has been introduced\nas part of the Armv8.3 architecture. I originally missed this, and\n(hopefully) should be the final patch for assembler support.\n\nDifferential Revision: https://reviews.llvm.org/D41396\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321155 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/ppenzin/llvm/commits/5eba494772fb9f74e8f7209de554da5bb2f75fa8"},{"sha":"7b05d3922f1f3107f304f38c88c63acad830cca8","author":{"name":"Sander de Smalen","email":"715d8879f2ffe09f813020108dc164740f5cf013@arm.com"},"message":"[AArch64] Asm: Fix parsing of register aliases that have a name starting with 'z'\n\nSummary: This fixes an issue as identified by @rnk in https://reviews.llvm.org/rL321029.\n\nReviewers: rnk, fhahn, rengolin, efriedma, echristo, olista01\n\nReviewed By: rnk, fhahn\n\nSubscribers: aemerson, javed.absar, kristof.beyls, llvm-commits, rnk\n\nDifferential Revision: https://reviews.llvm.org/D41382\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321158 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/ppenzin/llvm/commits/7b05d3922f1f3107f304f38c88c63acad830cca8"},{"sha":"ea96fe14feb5396d179c4f7681d323b762166e64","author":{"name":"Bjorn Steinbrink","email":"a161508d4cfbab4c18528135af9d287489cc9e31@gmail.com"},"message":"Give up on array allocas in getPointerDereferenceableBytes\n\nSummary:\nAs suggested by Eli Friedman, don't try to handle array allocas here,\nbecause of possible overflows, instead rely on instcombine converting\nthem to allocations of array types.\n\nReviewers: efriedma\n\nSubscribers: llvm-commits\n\nDifferential Revision: https://reviews.llvm.org/D41398\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321159 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/ppenzin/llvm/commits/ea96fe14feb5396d179c4f7681d323b762166e64"},{"sha":"d2c80d9fc141c25555ccd3c28a7237d7438db004","author":{"name":"Tim Northover","email":"f2f324cbf35679814b7526a760f2841b68589222@apple.com"},"message":"AArch64: fix one more place movi.2d could be created.\n\nSomehow got missed out of r320965.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321162 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/ppenzin/llvm/commits/d2c80d9fc141c25555ccd3c28a7237d7438db004"},{"sha":"bb61415adfb276a4366552f15dc03a1d4087ebb9","author":{"name":"Sander de Smalen","email":"715d8879f2ffe09f813020108dc164740f5cf013@arm.com"},"message":"[AArch64][SVE] Re-submit patch series for ZIP1/ZIP2\n\nThis patch resubmits the SVE ZIP1/ZIP2 patch series consisting of\nof r320992, r320986, r320973, and r320970 by reverting\nhttps://reviews.llvm.org/rL321024.\n\nThe issue that caused r321024 has been addressed in https://reviews.llvm.org/rL321158,\nso this patch-series should be safe to resubmit.\n\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321163 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/ppenzin/llvm/commits/bb61415adfb276a4366552f15dc03a1d4087ebb9"},{"sha":"b68371dd25db76363b6b5da5fcd2801ec0ca4479","author":{"name":"Florian Hahn","email":"12361630f7250c697c4c1d8d09a51b043b86c692@arm.com"},"message":"[ARM] Lower unsigned saturation to USAT \n\nSummary:\nImplement lower of unsigned saturation on an interval [0, k] where k + 1 is a power of two using USAT instruction in a similar way to how [~k, k] is lowered using SSAT on ARM models that supports it.\n\nPatch by Marten Svanfeldt\n\nReviewers: t.p.northover, pbarrio, eastig, SjoerdMeijer, javed.absar, fhahn\n\nReviewed By: fhahn\n\nSubscribers: fhahn, aemerson, javed.absar, llvm-commits, kristof.beyls\n\nDifferential Revision: https://reviews.llvm.org/D41348\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321164 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/ppenzin/llvm/commits/b68371dd25db76363b6b5da5fcd2801ec0ca4479"}]}
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