{"push_id":1692563207,"size":12,"distinct_size":1,"ref":"refs/heads/i2006-drcachesim-threadpool","head":"6824ec7ed8cd388af58a94f85094636653104888","before":"f438042a6b57a1f45ad8f32ea24f8e22e5494c53","commits":[{"sha":"0420d8223ce8bfc36526ed196ee488c4d2973fbf","author":{"name":"Derek Bruening","email":"5c9304747aa76bca89fdf247a67e2d731beb81a9@google.com"},"message":"i#511 drreg: fix 2 bugs in aflags-in-xax (#2352)\n\nFixes two bugs from 00d39c7 on keeping aflags in eax where possible:\r\n\r\n1) We were failing to give up the xax register after an app aflags write.\r\n\r\n2) If xax is unreserved but unrestored we were re-spilling it to a new\r\n   slot, leaking the old slot.\r\n\r\nA test is forthcoming but requires a fix for i#2351 first.","distinct":false,"url":"https://api.github.com/repos/DynamoRIO/dynamorio/commits/0420d8223ce8bfc36526ed196ee488c4d2973fbf"},{"sha":"7643545f37584caadf28198438604297a1acfcc7","author":{"name":"Derek Bruening","email":"5c9304747aa76bca89fdf247a67e2d731beb81a9@google.com"},"message":"i#2351: make aflags restore non-destructive (#2353)\n\nChanges drreg's aflags restore from the destructive \"add 0x7f, al\" to\r\n\"cmp 0x81, al\" to avoid corrupting the aflags being stored in eax.\r\n\r\nAdds a test of aflags reserve+restore before every instr.\r\n\r\nFixes #2351","distinct":false,"url":"https://api.github.com/repos/DynamoRIO/dynamorio/commits/7643545f37584caadf28198438604297a1acfcc7"},{"sha":"4afa0bd0d3a2c5ed4413fd6b5820baed27248350","author":{"name":"Derek Bruening","email":"5c9304747aa76bca89fdf247a67e2d731beb81a9@google.com"},"message":"i#511 drreg: add drreg_restore_app_aflags() (#2355)\n\nAdds a new API routine for restoring the app's aflags value on demand.\r\nThis is required for instrumentation that needs to spill the aflags but\r\ntest the app's value in the middle of tool code.\r\n\r\nAdds tests to drreg-test.","distinct":false,"url":"https://api.github.com/repos/DynamoRIO/dynamorio/commits/4afa0bd0d3a2c5ed4413fd6b5820baed27248350"},{"sha":"27813bb6c59864bd1f28723fdce9e57bfa42a008","author":{"name":"Derek Bruening","email":"5c9304747aa76bca89fdf247a67e2d731beb81a9@google.com"},"message":"Merge the sigreturn and asynch linkstubs (#2359)\n\nCurrently Windows has the \"asynch\" special linkstub and UNIX has the\r\n\"sigreturn\" special linkstub.  Both operate identically as far as dispatch\r\nis concerned, and we've already overloaded the sigreturn linkstub for\r\nforging exceptions.  We go ahead and merge the two into a single\r\ncross-platform asynch linkstub.","distinct":false,"url":"https://api.github.com/repos/DynamoRIO/dynamorio/commits/27813bb6c59864bd1f28723fdce9e57bfa42a008"},{"sha":"c839a547c68ddfe40a6d7291c99e3fc73b8aeed6","author":{"name":"Derek Bruening","email":"5c9304747aa76bca89fdf247a67e2d731beb81a9@google.com"},"message":"i#2263, i#2360: disable drreg aflags tests until aarch is fixed (#2361)\n\nDisables the drreg aflags tests added in 7643545 and 0420d82 until aarch\r\ncore flags issues are fixed.","distinct":false,"url":"https://api.github.com/repos/DynamoRIO/dynamorio/commits/c839a547c68ddfe40a6d7291c99e3fc73b8aeed6"},{"sha":"9da55c64afed0ccd527e30d0233b869dbdbd081d","author":{"name":"Derek Bruening","email":"5c9304747aa76bca89fdf247a67e2d731beb81a9@google.com"},"message":"i#2360: consistently label nzcvqg as arithmetic on ARM (#2362)\n\nDR considers the Q and GE flags to be arithmetic for saving, restoring, and\r\nin the EFLAGS_ARITH constant, yet not in the EFLAGS_{READ,WRITE}_ARITH\r\ndefines.  We correct that here by including them in all arithmetic\r\ndefines.\r\n\r\nRe-enables the drreg test that was broken because of this.\r\n\r\nRelaxes a drreg assert on re-spilling to the aflags slot with different\r\nregs, which is exposed by this fix.  This relaxation mirrors what we\r\nalready do on restoring aflags.\r\n\r\nFixes #2360","distinct":false,"url":"https://api.github.com/repos/DynamoRIO/dynamorio/commits/9da55c64afed0ccd527e30d0233b869dbdbd081d"},{"sha":"3275b814a134ab5a384ce7ec4bf6267b997cc54f","author":{"name":"Florian Hahn","email":"12361630f7250c697c4c1d8d09a51b043b86c692@arm.com"},"message":" i#1569 AArch64: Add support for implicit X30 operands for BL and BLR.  (#2345)\n\nThe BL and BLR instruction store the return address in X30, This patch\r\nadds X30 as (implicit) destination register for BL and BLR.","distinct":false,"url":"https://api.github.com/repos/DynamoRIO/dynamorio/commits/3275b814a134ab5a384ce7ec4bf6267b997cc54f"},{"sha":"b98cdb8058d15e48b186bdda284ea583d5f7d8aa","author":{"name":"Florian Hahn","email":"12361630f7250c697c4c1d8d09a51b043b86c692@arm.com"},"message":"i#1569 AArch64: Add macro to create BL instructions. (#2332)\n\nThis patch adds an INSTR_CREATE_bl macro to create branch and link instructions on AArch64.","distinct":false,"url":"https://api.github.com/repos/DynamoRIO/dynamorio/commits/b98cdb8058d15e48b186bdda284ea583d5f7d8aa"},{"sha":"21988872fa6728ced835be6dff895ec89d9063e2","author":{"name":"Florian Hahn","email":"12361630f7250c697c4c1d8d09a51b043b86c692@arm.com"},"message":"i#1621 AArch64: Add generic insert_push_or_pop_registers function. (#2343)\n\nThis patch adds generic helper functions for\r\ninsert_{push, pop}_all_registers, that can be used to push\r\nall GPRs or SIMD registers to memory, taking reg_skip into\r\naccount.\r\n\r\nThe intention behind adding this function is to reduce code\r\nduplication. It can also be used to save/restore GPRs for clean call\r\ninlining and in core/arch/aarch64/emit_utils.c. I'll create separate\r\npull requests for those changes.","distinct":false,"url":"https://api.github.com/repos/DynamoRIO/dynamorio/commits/21988872fa6728ced835be6dff895ec89d9063e2"},{"sha":"a59f7dfe0cf74a1cd1090e36b19c72ced851e47a","author":{"name":"Florian Hahn","email":"12361630f7250c697c4c1d8d09a51b043b86c692@arm.com"},"message":"i#1621 AArch64 cc opt: Use analyze_callee_regs_usage for GPRs. (#2342)\n\nThis patch implements analyze_callee_regs_usage to analyze the usage of\r\nGPRs in the callee. insert_push_all_registers and\r\ninsert_pop_all_registers do not save and restore unused registers.\r\n\r\ncleanall_opt=1 has limited support now and is the default level for\r\nAArch64.\r\n\r\nBased on work by Kevin Zhou and Edmund Grimley-Evans.","distinct":false,"url":"https://api.github.com/repos/DynamoRIO/dynamorio/commits/a59f7dfe0cf74a1cd1090e36b19c72ced851e47a"},{"sha":"846b5d4f10fec47ba6150ae1f8e674edefd00129","author":{"name":"zhaoqin","email":"0b99bed6a5aa57b4af43f3532dc4ffd01e90bcbb@users.noreply.github.com"},"message":"i#297 delay client-sideline-thread exit: fix several bugs (#2370)\n\nFixed several bugs in delayed client sideline threads exit.\r\n\r\n- add fragment_exit_post_sideline to delete shared_cache_flush_lock\r\n  after instrument_exit,\r\n- add dynamo_exited_all_other_threads reset for reattachment,\r\n  initialize dcontext->client_data->suspendable to be true,\r\n- add flag threads_are_stale in synch_with_all_threads to enforce loop\r\n  and avoid stale pointer in threads,\r\n- skip synching client sideline threads in detach_on_permanent_stack\r\n  during detachment,\r\n- skip terminating client sideline threads in detach_on_permanent_stack,\r\n- use app tls gdb index for apps that are statically linked with DR,\r\n- add test for static detach/attach with client sideline threads.","distinct":false,"url":"https://api.github.com/repos/DynamoRIO/dynamorio/commits/846b5d4f10fec47ba6150ae1f8e674edefd00129"},{"sha":"6824ec7ed8cd388af58a94f85094636653104888","author":{"name":"zhaoqin","email":"0b99bed6a5aa57b4af43f3532dc4ffd01e90bcbb@users.noreply.github.com"},"message":"Merge branch 'master' into i2006-drcachesim-threadpool","distinct":true,"url":"https://api.github.com/repos/DynamoRIO/dynamorio/commits/6824ec7ed8cd388af58a94f85094636653104888"}]}
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