{"push_id":1696359574,"size":1,"distinct_size":1,"ref":"refs/heads/master","head":"2d102107a5e107f49e66f00f55acd116a88ba06f","before":"9dc9670df2fb0e852571472be7d01e61fd16e7ef","commits":[{"sha":"2d102107a5e107f49e66f00f55acd116a88ba06f","author":{"name":"uros","email":"4353b149a651e252ccaad23fae27e76cd0e2b021@138bc75d-0d04-0410-961f-82ee72b054a4"},"message":"\tPR target/70799\n\t* config/i386/i386.c (dimode_scalar_to_vector_candidate_p)\n\t<case ASHIFT, case LSHIFTRT>: Also consider variable shifts.\n\tCheck \"XEXP (src, 1)\" operand here.\n\t<case PLUS, case MINUS, case IOR, case XOR, case AND>:\n\tCheck \"XEXP (src, 1)\" operand here.\n\t(dimode_scalar_chain::make_vector_copies): Detect count register\n\tof a shift instruction.  Zero extend count register from QImode\n\tto DImode to satisfy vector shift pattern count operand predicate.\n\tSubstitute vector shift count operand with a DImode copy.\n\t(dimode_scalar_chain::convert_reg): Ditto, zero-extend from\n\tvector register.\n\ntestsuite/ChangeLog:\n\n\tPR target/70799\n\t* gcc.target/i186/pr70799-4.c: New test.\n\n\n\ngit-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@247082 138bc75d-0d04-0410-961f-82ee72b054a4","distinct":true,"url":"https://api.github.com/repos/kraj/gcc/commits/2d102107a5e107f49e66f00f55acd116a88ba06f"}]}
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