{"push_id":1615217018,"size":67,"distinct_size":67,"ref":"refs/heads/master","head":"d84f714eafedd8bb9d4aaec8b76417bef8e3535e","before":"dd4d2578215cd380f40a38028a9904e15b135ef3","commits":[{"sha":"06cc3551714f2c9ee0d12f78a2ecd7e21b484fc8","author":{"name":"Philippe Mathieu-Daudé","email":"51f22ed298acb64cce73fdf98fc54cf485c01eda@amsat.org"},"message":"tests/docker: support proxy / corporate firewall\n\nif ftp_proxy/http_proxy/https_proxy standard environment variables available,\npass them to the docker daemon to build images.\nthis is required when building behind corporate proxy/firewall, but also help\nwhen using local cache server (ie: apt/yum).\n\nSigned-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>\nMessage-Id: <20170306205520.32311-1-f4bug@amsat.org>\nReviewed-by: Fam Zheng <famz@redhat.com>\nSigned-off-by: Fam Zheng <famz@redhat.com>","distinct":true,"url":"https://api.github.com/repos/francois-wellenreiter/qemu/commits/06cc3551714f2c9ee0d12f78a2ecd7e21b484fc8"},{"sha":"83fd9629a39ee8a58f1f772a2ca3a7745a4c5743","author":{"name":"Alex Bennée","email":"39f80399868a825be6587708c1426500fb9dbed0@linaro.org"},"message":"vl/cpus: be smarter with icount and MTTCG\n\nThe sense of the test was inverted. Make it simple, if icount is\nenabled then we disabled MTTCG by default. If the user tries to force\nMTTCG upon us then we tell them \"no\".\n\nSigned-off-by: Alex Bennée <alex.bennee@linaro.org>\nReviewed-by: Richard Henderson <rth@twiddle.net>","distinct":true,"url":"https://api.github.com/repos/francois-wellenreiter/qemu/commits/83fd9629a39ee8a58f1f772a2ca3a7745a4c5743"},{"sha":"72c1701f62e8d44eb24a0583a958edc280105455","author":{"name":"Alex Bennée","email":"39f80399868a825be6587708c1426500fb9dbed0@linaro.org"},"message":"target/i386/cpu.h: declare TCG_GUEST_DEFAULT_MO\n\nThis suppresses the incorrect warning when forcing MTTCG for x86\nguests on x86 hosts. A future patch will still warn when\nTARGET_SUPPORT_MTTCG hasn't been defined for the guest (which is still\npending for x86).\n\nReported-by: Paolo Bonzini <pbonzini@redhat.com>\nSigned-off-by: Alex Bennée <alex.bennee@linaro.org>\nReviewed-by: Richard Henderson <rth@twiddle.net>\nReviewed-by: Eduardo Habkost <ehabkost@redhat.com>\nAcked-by: Eduardo Habkost <ehabkost@redhat.com>","distinct":true,"url":"https://api.github.com/repos/francois-wellenreiter/qemu/commits/72c1701f62e8d44eb24a0583a958edc280105455"},{"sha":"c34c762015fec023c3ea5cf3629cbac462a80973","author":{"name":"Alex Bennée","email":"39f80399868a825be6587708c1426500fb9dbed0@linaro.org"},"message":"cpus.c: add additional error_report when !TARGET_SUPPORT_MTTCG\n\nWhile we may fail the memory ordering check later that can be\nconfusing. So in cases where TARGET_SUPPORT_MTTCG has yet to be\ndefined we should say so specifically.\n\nSigned-off-by: Alex Bennée <alex.bennee@linaro.org>\nReviewed-by: Richard Henderson <rth@twiddle.net>\nReviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>","distinct":true,"url":"https://api.github.com/repos/francois-wellenreiter/qemu/commits/c34c762015fec023c3ea5cf3629cbac462a80973"},{"sha":"5ee5993001cf32addb86a92e2ae8cb090fbc1462","author":{"name":"Alex Bennée","email":"39f80399868a825be6587708c1426500fb9dbed0@linaro.org"},"message":"sparc/sparc64: grab BQL before calling cpu_check_irqs\n\nIRQ modification is part of device emulation and should be done while\nthe BQL is held to prevent races when MTTCG is enabled. This adds\nassertions in the hw emulation layer and wraps the calls from helpers\nin the BQL.\n\nReported-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>\nSigned-off-by: Alex Bennée <alex.bennee@linaro.org>","distinct":true,"url":"https://api.github.com/repos/francois-wellenreiter/qemu/commits/5ee5993001cf32addb86a92e2ae8cb090fbc1462"},{"sha":"278f5e98c647f74e93636e8b6f9ba20a71765a44","author":{"name":"Alex Bennée","email":"39f80399868a825be6587708c1426500fb9dbed0@linaro.org"},"message":"s390x/misc_helper.c: wrap IO instructions in BQL\n\nHelpers that can trigger IO events (including interrupts) need to be\nprotected by the BQL. I've updated all the helpers that call into an\nioinst_handle_* functions.\n\nReported-by: Thomas Huth <thuth@redhat.com>\nSigned-off-by: Alex Bennée <alex.bennee@linaro.org>\nReviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>","distinct":true,"url":"https://api.github.com/repos/francois-wellenreiter/qemu/commits/278f5e98c647f74e93636e8b6f9ba20a71765a44"},{"sha":"47e20887970c3f267a4be9afacb72dbd51e6655f","author":{"name":"Alex Bennée","email":"39f80399868a825be6587708c1426500fb9dbed0@linaro.org"},"message":"target/xtensa: hold BQL for interrupt processing\n\nMake sure we have the BQL held when processing interrupts.\n\nReported-by: Thomas Huth <thuth@redhat.com>\nSigned-off-by: Alex Bennée <alex.bennee@linaro.org>\nAcked-by: Max Filippov <jcmvbkbc@gmail.com>","distinct":true,"url":"https://api.github.com/repos/francois-wellenreiter/qemu/commits/47e20887970c3f267a4be9afacb72dbd51e6655f"},{"sha":"d8b2239bcd8872a5c5f7534d1658fc2365caab2d","author":{"name":"Alex Bennée","email":"39f80399868a825be6587708c1426500fb9dbed0@linaro.org"},"message":"translate-all: exit cpu_restore_state early if translating\n\nThe translation code uses cpu_ld*_code which can trigger a tlb_fill\nwhich if it fails will erroneously attempts a fault resolution. This\nnever works during translation as the TB being generated hasn't been\nadded yet. The target should have checked retaddr before calling\ncpu_restore_state but for those that have yet to be fixed we do it\nhere to avoid a recursive tb_lock() under MTTCG's new locking regime.\n\nSigned-off-by: Alex Bennée <alex.bennee@linaro.org>\nReviewed-by: Richard Henderson <rth@twiddle.net>","distinct":true,"url":"https://api.github.com/repos/francois-wellenreiter/qemu/commits/d8b2239bcd8872a5c5f7534d1658fc2365caab2d"},{"sha":"d394698d73836d1c50545bdb32dc58d09708fcfb","author":{"name":"Yongbok Kim","email":"969c622b9968eb66806a2b89b48c57a983552e88@imgtec.com"},"message":"target/mips: hold BQL for timer interrupts\n\nHold BQL when accessing timer which can cause interrupts\n\nSigned-off-by: Yongbok Kim <yongbok.kim@imgtec.com>\nReviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>\nSigned-off-by: Alex Bennée <alex.bennee@linaro.org>","distinct":true,"url":"https://api.github.com/repos/francois-wellenreiter/qemu/commits/d394698d73836d1c50545bdb32dc58d09708fcfb"},{"sha":"10cde894b63146139f981857e4eedf756fa53dcb","author":{"name":"Paolo Bonzini","email":"7438500e0207b21c4e5dfca8d2a7898734cd7706@redhat.com"},"message":"target-i386: defer VMEXIT to do_interrupt\n\nPaths through the softmmu code during code generation now need to be audited\nto check for double locking of tb_lock.  In particular, VMEXIT can take tb_lock\nthrough cpu_vmexit -> cpu_x86_update_cr4 -> tlb_flush.\n\nTo avoid this, split VMEXIT delivery in two parts, similar to what is done with\nexceptions.  cpu_vmexit only records the VMEXIT exit code and information, and\ncc->do_interrupt can then deliver it when it is safe to take the lock.\n\nReported-by: Alexander Boettcher <alexander.boettcher@genode-labs.com>\nSuggested-by: Richard Henderson <rth@twiddle.net>\nTested-by: Alexander Boettcher <alexander.boettcher@genode-labs.com>\nSigned-off-by: Paolo Bonzini <pbonzini@redhat.com>\nSigned-off-by: Alex Bennée <alex.bennee@linaro.org>\nReviewed-by: Richard Henderson <rth@twiddle.net>","distinct":true,"url":"https://api.github.com/repos/francois-wellenreiter/qemu/commits/10cde894b63146139f981857e4eedf756fa53dcb"},{"sha":"6568da459b611845ef55526cd23afc9fa9f4647f","author":{"name":"Alex Bennée","email":"39f80399868a825be6587708c1426500fb9dbed0@linaro.org"},"message":"target/arm/helper: make it clear the EC field is also in hex\n\n..just like the rest of the displayed ESR register. Otherwise people\nmight scratch their heads if a not obviously hex number is displayed\nfor the EC field.\n\nSigned-off-by: Alex Bennée <alex.bennee@linaro.org>\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nReviewed-by: KONRAD Frederic <fred.konrad@greensocs.com>\nReviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>","distinct":true,"url":"https://api.github.com/repos/francois-wellenreiter/qemu/commits/6568da459b611845ef55526cd23afc9fa9f4647f"},{"sha":"68bf93ce9dc5c84c45a827ce2bd6eab768524e79","author":{"name":"Alex Bennée","email":"39f80399868a825be6587708c1426500fb9dbed0@linaro.org"},"message":"hw/intc/arm_gic: modernise the DPRINTF\n\nWhile I was debugging the icount issues I realised a bunch of the\nmessages look quite similar. I've fixed this by including __func__ in\nthe debug print. At the same time I move the a modern if (GATE) style\nprintf which ensures the compiler can check for format string errors\neven if the code gets optimised away in the non-DEBUG_GIC case.\n\nSigned-off-by: Alex Bennée <alex.bennee@linaro.org>\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nReviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>","distinct":true,"url":"https://api.github.com/repos/francois-wellenreiter/qemu/commits/68bf93ce9dc5c84c45a827ce2bd6eab768524e79"},{"sha":"95b0eca46e03ffa0b20d29d1b3127c291accea39","author":{"name":"Peter Maydell","email":"d4da0cae8bdd6af8ce5950fc7fec7c012df68229@linaro.org"},"message":"Merge remote-tracking branch 'remotes/stsquad/tags/pull-mttcg-fixups-090317-1' into staging\n\nFix-ups for MTTCG regressions for 2.9\n\nThis is the same as v3 posted a few days ago except with a few extra\nReviewed-by tags added.\n\n# gpg: Signature made Thu 09 Mar 2017 10:45:18 GMT\n# gpg:                using RSA key 0xFBD0DB095A9E2A44\n# gpg: Good signature from \"Alex Bennée (Master Work Key) <alex.bennee@linaro.org>\"\n# Primary key fingerprint: 6685 AE99 E751 67BC AFC8  DF35 FBD0 DB09 5A9E 2A44\n\n* remotes/stsquad/tags/pull-mttcg-fixups-090317-1:\n  hw/intc/arm_gic: modernise the DPRINTF\n  target/arm/helper: make it clear the EC field is also in hex\n  target-i386: defer VMEXIT to do_interrupt\n  target/mips: hold BQL for timer interrupts\n  translate-all: exit cpu_restore_state early if translating\n  target/xtensa: hold BQL for interrupt processing\n  s390x/misc_helper.c: wrap IO instructions in BQL\n  sparc/sparc64: grab BQL before calling cpu_check_irqs\n  cpus.c: add additional error_report when !TARGET_SUPPORT_MTTCG\n  target/i386/cpu.h: declare TCG_GUEST_DEFAULT_MO\n  vl/cpus: be smarter with icount and MTTCG\n\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":true,"url":"https://api.github.com/repos/francois-wellenreiter/qemu/commits/95b0eca46e03ffa0b20d29d1b3127c291accea39"},{"sha":"8ba1e5f72b17584f23e17c54494bb4beeb05174e","author":{"name":"Alex Bennée","email":"39f80399868a825be6587708c1426500fb9dbed0@linaro.org"},"message":"docker/dockerfiles/debian-s390-cross: include clang\n\nIt's a silly little limitation on Shippable that is looks for clang\nin the container even though we won't use it. The arm/aarch64 cross\nbuilds inherit this from debian.docker but as we needed to use\ndebian-testing for this we add it here. We also collapse the update\nstep into one RUN line to remove and intermediate layer of the docker\nbuild.\n\nSigned-off-by: Alex Bennée <alex.bennee@linaro.org>\nMessage-Id: <20170306112848.659-1-alex.bennee@linaro.org>\nSigned-off-by: Fam Zheng <famz@redhat.com>","distinct":true,"url":"https://api.github.com/repos/francois-wellenreiter/qemu/commits/8ba1e5f72b17584f23e17c54494bb4beeb05174e"},{"sha":"20271d484069f154fb262507e63adc3a37e885d2","author":{"name":"Eduardo Habkost","email":"1434a0c554a4542f3cf3c2e7be483467bba16117@redhat.com"},"message":"i386: host_vendor_fms() helper function\n\nHelper function for code that needs to check the host CPU\nvendor/family/model/stepping values.\n\nSigned-off-by: Eduardo Habkost <ehabkost@redhat.com>\nMessage-Id: <20170309181212.18864-2-ehabkost@redhat.com>\nSigned-off-by: Eduardo Habkost <ehabkost@redhat.com>","distinct":true,"url":"https://api.github.com/repos/francois-wellenreiter/qemu/commits/20271d484069f154fb262507e63adc3a37e885d2"},{"sha":"40e80ee4113ad957b633cbdddb7423952bb76974","author":{"name":"Eduardo Habkost","email":"1434a0c554a4542f3cf3c2e7be483467bba16117@redhat.com"},"message":"i386/kvm: Blacklist TSX on known broken hosts\n\nSome Intel CPUs are known to have a broken TSX implementation. A\nmicrocode update from Intel disabled TSX on those CPUs, but\nGET_SUPPORTED_CPUID might be reporting it as supported if the\nhosts were not updated yet.\n\nManually fixup the GET_SUPPORTED_CPUID data to ensure we will\nnever enable TSX when running on those hosts.\n\nReference:\n* glibc commit 2702856bf45c82cf8e69f2064f5aa15c0ceb6359:\n  https://sourceware.org/git/?p=glibc.git;a=commit;h=2702856bf45c82cf8e69f2064f5aa15c0ceb6359\n\nSigned-off-by: Eduardo Habkost <ehabkost@redhat.com>\nMessage-Id: <20170309181212.18864-3-ehabkost@redhat.com>\nSigned-off-by: Eduardo Habkost <ehabkost@redhat.com>","distinct":true,"url":"https://api.github.com/repos/francois-wellenreiter/qemu/commits/40e80ee4113ad957b633cbdddb7423952bb76974"},{"sha":"ec56a4a7b07e2943f49da273a31e3195083b1f2e","author":{"name":"Eduardo Habkost","email":"1434a0c554a4542f3cf3c2e7be483467bba16117@redhat.com"},"message":"i386: Change stepping of Haswell to non-blacklisted value\n\nglibc blacklists TSX on Haswell CPUs with model==60 and\nstepping < 4. To make the Haswell CPU model more useful, make\nthose guests actually use TSX by changing CPU stepping to 4.\n\nReferences:\n* glibc commit 2702856bf45c82cf8e69f2064f5aa15c0ceb6359\n  https://sourceware.org/git/?p=glibc.git;a=commit;h=2702856bf45c82cf8e69f2064f5aa15c0ceb6359\n\nSigned-off-by: Eduardo Habkost <ehabkost@redhat.com>\nMessage-Id: <20170309181212.18864-4-ehabkost@redhat.com>\nSigned-off-by: Eduardo Habkost <ehabkost@redhat.com>","distinct":true,"url":"https://api.github.com/repos/francois-wellenreiter/qemu/commits/ec56a4a7b07e2943f49da273a31e3195083b1f2e"},{"sha":"b1616fe0e2a311f5951cc51800a17a920b20a129","author":{"name":"Peter Maydell","email":"d4da0cae8bdd6af8ce5950fc7fec7c012df68229@linaro.org"},"message":"Merge remote-tracking branch 'remotes/famz/tags/docker-pull-request' into staging\n\n# gpg: Signature made Fri 10 Mar 2017 07:15:38 GMT\n# gpg:                using RSA key 0xCA35624C6A9171C6\n# gpg: Good signature from \"Fam Zheng <famz@redhat.com>\"\n# gpg: WARNING: This key is not certified with sufficiently trusted signatures!\n# gpg:          It is not certain that the signature belongs to the owner.\n# Primary key fingerprint: 5003 7CB7 9706 0F76 F021  AD56 CA35 624C 6A91 71C6\n\n* remotes/famz/tags/docker-pull-request:\n  docker/dockerfiles/debian-s390-cross: include clang\n  tests/docker: support proxy / corporate firewall\n\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":true,"url":"https://api.github.com/repos/francois-wellenreiter/qemu/commits/b1616fe0e2a311f5951cc51800a17a920b20a129"},{"sha":"a410a7f1af725cee94c7c847ddc85be043d88439","author":{"name":"Vladimir Sementsov-Ogievskiy","email":"2681deffe7a39260e16c307bad91464d2c30d47f@virtuozzo.com"},"message":"backup: allow target without .bdrv_get_info\n\nCurrently backup to nbd target is broken, as nbd doesn't have\n.bdrv_get_info realization.\n\nSigned-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>\nReviewed-by: Eric Blake <eblake@redhat.com>\nSigned-off-by: Kevin Wolf <kwolf@redhat.com>","distinct":true,"url":"https://api.github.com/repos/francois-wellenreiter/qemu/commits/a410a7f1af725cee94c7c847ddc85be043d88439"},{"sha":"9103f1ceb46614b150bcbc3c9a4fbc72b47fedcc","author":{"name":"Fam Zheng","email":"fee53c2705d9be73af7f618dd56700ae37511c73@redhat.com"},"message":"file-posix: Consider max_segments for BlockLimits.max_transfer\n\nBlockLimits.max_transfer can be too high without this fix, guest will\nencounter I/O error or even get paused with werror=stop or rerror=stop. The\ncause is explained below.\n\nLinux has a separate limit, /sys/block/.../queue/max_segments, which in\nthe worst case can be more restrictive than the BLKSECTGET which we\nalready consider (note that they are two different things). So, the\nfailure scenario before this patch is:\n\n1) host device has max_sectors_kb = 4096 and max_segments = 64;\n2) guest learns max_sectors_kb limit from QEMU, but doesn't know\n   max_segments;\n3) guest issues e.g. a 512KB request thinking it's okay, but actually\n   it's not, because it will be passed through to host device as an\n   SG_IO req that has niov > 64;\n4) host kernel doesn't like the segmenting of the request, and returns\n   -EINVAL;\n\nThis patch checks the max_segments sysfs entry for the host device and\ncalculates a \"conservative\" bytes limit using the page size, which is\nthen merged into the existing max_transfer limit. Guest will discover\nthis from the usual virtual block device interfaces. (In the case of\nscsi-generic, it will be done in the INQUIRY reply interception in\ndevice model.)\n\nThe other possibility is to actually propagate it as a separate limit,\nbut it's not better. On the one hand, there is a big complication: the\nlimit is per-LUN in QEMU PoV (because we can attach LUNs from different\nhost HBAs to the same virtio-scsi bus), but the channel to communicate\nit in a per-LUN manner is missing down the stack; on the other hand,\ntwo limits versus one doesn't change much about the valid size of I/O\n(because guest has no control over host segmenting).\n\nAlso, the idea to fall back to bounce buffering in QEMU, upon -EINVAL,\nwas explored. Unfortunately there is no neat way to ensure the bounce\nbuffer is less segmented (in terms of DMA addr) than the guest buffer.\n\nPractically, this bug is not very common. It is only reported on a\nEmulex (lpfc), so it's okay to get it fixed in the easier way.\n\nReviewed-by: Paolo Bonzini <pbonzini@redhat.com>\nSigned-off-by: Fam Zheng <famz@redhat.com>\nSigned-off-by: Kevin Wolf <kwolf@redhat.com>","distinct":true,"url":"https://api.github.com/repos/francois-wellenreiter/qemu/commits/9103f1ceb46614b150bcbc3c9a4fbc72b47fedcc"}]}
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