{"push_id":1519042917,"size":866,"distinct_size":0,"ref":"refs/heads/drm-tip","head":"c34072a82a390d575f7f0394fcf92437898d75d3","before":"584adc8f6687d7f6832ce060c3f6022282119f18","commits":[{"sha":"379f10910c962e3be187317ee3b8e981ba6d3b03","author":{"name":"Pankaj Dubey","email":"fea3fc7983b0942003b08481b7f1769b5d89572e@samsung.com"},"message":"ARM: EXYNOS: Remove smp_init_cpus hook from platsmp.c\n\nWe can safely remove exynos_smp_init_cpus() hook from mach-exynos/platsmp.c,\nas all SMP platforms in mach-exynos can rely on DT for CPU core description\ninstead of determining number of cores from the SCU.\n\nSigned-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>\nReviewed-by: Alim Akhtar <alim.akhtar@samsung.com>\nTested-by: Marek Szyprowski <m.szyprowski@samsung.com>\nSigned-off-by: Krzysztof Kozlowski <krzk@kernel.org>","distinct":false,"url":"https://api.github.com/repos/dhnkrn/drm-tip/commits/379f10910c962e3be187317ee3b8e981ba6d3b03"},{"sha":"9d56d6cb4e937ead2c6a45d11b8441ea512c6b80","author":{"name":"Sylwester Nawrocki","email":"9d0f506b0e5e9ea669e339e7c6f2335300f9f6d0@samsung.com"},"message":"ARM: S3C24XX: Add DMA slave maps for remaining s3c24xx SoCs\n\nThis patch adds DMA slave map tables for the remaining s3c24xx\nSoC types so the whole platform can be switched to the new API.\nA few devices for which there was no DMA support with current\ncode are omitted from the tables.\n\nSigned-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>\nSigned-off-by: Krzysztof Kozlowski <krzk@kernel.org>","distinct":false,"url":"https://api.github.com/repos/dhnkrn/drm-tip/commits/9d56d6cb4e937ead2c6a45d11b8441ea512c6b80"},{"sha":"14944934f8ace3cb7c02edfbdfb664577de53365","author":{"name":"Grygorii Strashko","email":"6313aa67c79f49bbc5c7e7685d9d3910b42c6984@ti.com"},"message":"ARM: OMAP2+: Remove legacy gpio code\n\nOMAP2+ GPOs are initialized now using device tree, so legacy gpio\ninitialization code can be removed.\n\nSigned-off-by: Grygorii Strashko <grygorii.strashko@ti.com>\nSigned-off-by: Tony Lindgren <tony@atomide.com>","distinct":false,"url":"https://api.github.com/repos/dhnkrn/drm-tip/commits/14944934f8ace3cb7c02edfbdfb664577de53365"},{"sha":"47af2c676ae1e84140225d261a00bdf88f1f9f7e","author":{"name":"William Breathitt Gray","email":"2ba215613a6287d27eb5910e94647974da83b306@gmail.com"},"message":"iio: 104-quad-8: Fix index control configuration\n\nThe LS7266R1 requires bits 5 & 6 to be high in order to select the Index\nControl Register. This patch fixes a typo that incorrectly selects the\nInput/Output Control Register where the Index Control Register was\ndesired.\n\nFixes: 28e5d3bb0325 (\"iio: 104-quad-8: Add IIO support for the ACCES 104-QUAD-8\")\nSigned-off-by: William Breathitt Gray <vilhelm.gray@gmail.com>\nCc: <Stable@vger.kernel.org>\nSigned-off-by: Jonathan Cameron <jic23@kernel.org>","distinct":false,"url":"https://api.github.com/repos/dhnkrn/drm-tip/commits/47af2c676ae1e84140225d261a00bdf88f1f9f7e"},{"sha":"7e1c4058e741c781b262b15a2e86a40602aaa6b6","author":{"name":"William Breathitt Gray","email":"2ba215613a6287d27eb5910e94647974da83b306@gmail.com"},"message":"iio: 104-quad-8: Fix off-by-one errors when addressing IOR\n\nThe Input/Output Control register (IOR) is offset by 1 from the\nrespective channel data register. This patch fixes off-by-one errors\nwhen attempting to write to a channel IOR where the base address was not\nproperly offset.\n\nFixes: 28e5d3bb0325 (\"iio: 104-quad-8: Add IIO support for the ACCES 104-QUAD-8\")\nSigned-off-by: William Breathitt Gray <vilhelm.gray@gmail.com>\nCc: <Stable@vger.kernel.org>\nSigned-off-by: Jonathan Cameron <jic23@kernel.org>","distinct":false,"url":"https://api.github.com/repos/dhnkrn/drm-tip/commits/7e1c4058e741c781b262b15a2e86a40602aaa6b6"},{"sha":"e91c3dfcd3ff88218c972cb24f932c4d434bbb09","author":{"name":"William Breathitt Gray","email":"2ba215613a6287d27eb5910e94647974da83b306@gmail.com"},"message":"iio: 104-quad-8: Fix active level mismatch for the preset enable option\n\nThe set_to_preset_on_index sysfs attribute provides a boolean\nconfiguration option to enable a preset operation on the respective\nchannel's counter when Index occurs. However, the corresponding\nconfiguration bit on the Input/Output Control register must be set low\nto enable the preset operation.\n\nThis patch inverts the internal driver boolean logic exposed via the\nset_to_preset_on_index attribute in order to correctly configure the\ndevice which expects an active low bit.\n\nFixes: 28e5d3bb0325 (\"iio: 104-quad-8: Add IIO support for the ACCES 104-QUAD-8\")\nSigned-off-by: William Breathitt Gray <vilhelm.gray@gmail.com>\nCc: <Stable@vger.kernel.org>\nSigned-off-by: Jonathan Cameron <jic23@kernel.org>","distinct":false,"url":"https://api.github.com/repos/dhnkrn/drm-tip/commits/e91c3dfcd3ff88218c972cb24f932c4d434bbb09"},{"sha":"da6b21e97e39d42f90ab490ce7b54a0fe2c3fe35","author":{"name":"Krzysztof Kozlowski","email":"78adc4ba6cc2031356f8548133d287acb43ad851@kernel.org"},"message":"ARM: Drop fixed 200 Hz timer requirement from Samsung platforms\n\nAll Samsung platforms, including the Exynos, are selecting HZ_FIXED with\n200 Hz.  Unfortunately in case of multiplatform image this affects also\nother platforms when Exynos is enabled.\n\nThis looks like an very old legacy code, dating back to initial\nupstreaming of S3C24xx.  Probably it was required for s3c24xx timer\ndriver, which was removed in commit ad38bdd15d5b (\"ARM: SAMSUNG: Remove\nunused plat-samsung/time.c\").\n\nSince then, this fixed 200 Hz spread everywhere, including out-of-tree\nSamsung kernels (SoC vendor's and Tizen's).  I believe this choice\nwas rather an effect of coincidence instead of conscious choice.\n\nOn S3C24xx, the PWM counter is only 16 bit wide, and with the\ntypical 12MHz input clock that overflows every 5.5ms.  This works\nwith HZ=200 or higher but not with HZ=100 which needs a 10ms\ninterval between ticks.  On Later chips (S3C64xx, S5P and EXYNOS),\nthe counter is 32 bits and does not have this problem.\n\nThe new samsung_pwm_timer driver solves the problem by scaling the input\nclock by a factor of 50 on S3C24xx, which makes it less accurate but\nallows HZ=100 as well as CONFIG_NO_HZ with fewer wakeups.\n\nFew perf mem and sched tests on Odroid XU3 board (Exynos5422, 4x Cortex\nA7, 4x Cortex A15) show no regressions when switching from 200 Hz to\nother values.\n\nReported-by: Lee Jones <lee.jones@linaro.org>\n[Dropping of 200_HZ from S3C/S5P was suggested by Arnd]\nReported-by: Arnd Bergmann <arnd@arndb.de>\nCc: Kukjin Kim <kgene@kernel.org>\nSigned-off-by: Krzysztof Kozlowski <krzk@kernel.org>\n[Tested on Exynos5800]\nTested-by: Javier Martinez Canillas <javier@osg.samsung.com>\nAcked-by: Kukjin Kim <kgene@kernel.org>\n[Tested on S3C2440]\nTested-by: Sylwester Nawrocki <s.nawrocki@samsung.com>\nAcked-by: Lee Jones <lee.jones@linaro.org>","distinct":false,"url":"https://api.github.com/repos/dhnkrn/drm-tip/commits/da6b21e97e39d42f90ab490ce7b54a0fe2c3fe35"},{"sha":"8ebcb400af619ee0ddeb39c06fc35511b20cc697","author":{"name":"Simon Horman","email":"6794a6886a01c3e0703587f01250d8dad41b4a90@verge.net.au"},"message":"arm64: dts: h3ulcb: Provide sd0_uhs node\n\nProvide separaate sd0 and sd0_uhs nodes rather than duplicate sd0 nodes.\n\nCc: Vladimir Barinov <vladimir.barinov@cogentembedded.com>\nCc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>\nFixes: 93373c309a70 (\"arm64: dts: h3ulcb: rename SDHI0 pins\")\nSigned-off-by: Simon Horman <horms+renesas@verge.net.au>","distinct":false,"url":"https://api.github.com/repos/dhnkrn/drm-tip/commits/8ebcb400af619ee0ddeb39c06fc35511b20cc697"},{"sha":"6fce983f9b3ef51d47e647b2cff15049ef803781","author":{"name":"Jose Abreu","email":"e2a3584083ea6f08302883f268b4c9e6e03e1fdc@synopsys.com"},"message":"ASoC: dwc: Fix PIO mode initialization\n\nWe can no longer rely on the return value of\ndevm_snd_dmaengine_pcm_register(...) to check if the DMA\nhandle is declared in the DT.\n\nPreviously this check activated PIO mode but currently\ndma_request_chan returns either a valid channel or -EPROBE_DEFER.\n\nIn order to activate PIO mode check instead if the interrupt\nline is declared. This reflects better what is documented in\nthe DT bindings (see Documentation/devicetree/bindings/sound/\ndesignware-i2s.txt).\n\nAlso, initialize use_pio variable which was never being set\ncausing PIO mode to never work.\n\nSigned-off-by: Jose Abreu <joabreu@synopsys.com>\nSigned-off-by: Mark Brown <broonie@kernel.org>","distinct":false,"url":"https://api.github.com/repos/dhnkrn/drm-tip/commits/6fce983f9b3ef51d47e647b2cff15049ef803781"},{"sha":"0ea617a298dcdc2251b4e10f83ac3f3e627b66e3","author":{"name":"Colin Ian King","email":"61b69653f478c16de27cbf2a77617b5a614a704a@canonical.com"},"message":"ASoC: rsnd: don't double free kctrl\n\nOn an error, snd_ctl_add already free's kctrl, so calling snd_ctl_free_one\nto free it again leads to a double free error.  Fix this by removing\nthe extraneous snd_ctl_free_one call.\n\nIssue found using static analysis with CoverityScan, CID 1372908\n\nSigned-off-by: Colin Ian King <colin.king@canonical.com>\nAcked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>\nSigned-off-by: Mark Brown <broonie@kernel.org>","distinct":false,"url":"https://api.github.com/repos/dhnkrn/drm-tip/commits/0ea617a298dcdc2251b4e10f83ac3f3e627b66e3"},{"sha":"c2b36129ce53a22b89dd2b88db33e7ffdefe0f41","author":{"name":"Colin Ian King","email":"61b69653f478c16de27cbf2a77617b5a614a704a@canonical.com"},"message":"ASoC: topology: kfree kcontrol->private_value before freeing kcontrol\n\nkcontrol->private_value is being kfree'd after kcontrol has been freed\n(in previous call to snd_ctl_remove).  Instead, fix this by kfreeing\nthe private_value before kcontrol.\n\nCoverityScan CID#1388311 \"Read from pointer after free\"\n\nFixes: eea3dd4f1247a (\"ASoC: topology: Only free TLV for volume mixers of a widget\")\nSigned-off-by: Colin Ian King <colin.king@canonical.com>\nSigned-off-by: Mark Brown <broonie@kernel.org>","distinct":false,"url":"https://api.github.com/repos/dhnkrn/drm-tip/commits/c2b36129ce53a22b89dd2b88db33e7ffdefe0f41"},{"sha":"8759fec4af222f338d08f8f1a7ad6a77ca6cb301","author":{"name":"Romain Perier","email":"052754d2a1b17922abb8910db2b5184d924f0c9e@free-electrons.com"},"message":"crypto: marvell - Copy IVDIG before launching partial DMA ahash requests\n\nCurrently, inner IV/DIGEST data are only copied once into the hash\nengines and not set explicitly before launching a request that is not a\nfirst frag. This is an issue especially when multiple ahash reqs are\ncomputed in parallel or chained with cipher request, as the state of the\nrequest being computed is not updated into the hash engine. It leads to\nnon-deterministic corrupted digest results.\n\nFixes: commit 2786cee8e50b (\"crypto: marvell - Move SRAM I/O operations to step functions\")\nSigned-off-by: Romain Perier <romain.perier@free-electrons.com>\nAcked-by: Boris Brezillon <boris.brezillon@free-electrons.com>\nCc: <stable@vger.kernel.org>\nSigned-off-by: Herbert Xu <herbert@gondor.apana.org.au>","distinct":false,"url":"https://api.github.com/repos/dhnkrn/drm-tip/commits/8759fec4af222f338d08f8f1a7ad6a77ca6cb301"},{"sha":"9e4d59ada4d602e78eee9fb5f898ce61fdddb446","author":{"name":"Takashi Sakamoto","email":"df5cd14c20ca9e9623cd2ae7eba41070ac8353e1@sakamocchi.jp"},"message":"ASoC: hdmi-codec: use unsigned type to structure members with bit-field\n\nThis is a fix for Linux 4.10-rc1.\n\nIn C language specification, a bit-field is interpreted as a signed or\nunsigned integer type consisting of the specified number of bits.\n\nIn GCC manual, the range of a signed bit field of N bits is from\n-(2^N) / 2 to ((2^N) / 2) - 1\nhttps://www.gnu.org/software/gnu-c-manual/gnu-c-manual.html#Bit-Fields\n\nTherefore, when defined as 1 bit-field with signed type, variables can\nrepresents -1 and 0.\n\nThe snd-soc-hdmi-codec module includes a structure which has signed type\nmembers with bit-fields. Codes of this module assign 0 and 1 to the\nmembers. This seems to result in implementation-dependent behaviours.\n\nAs of v4.10-rc1 merge window, outside of sound subsystem, this structure\nis referred by below GPU modules.\n - tda998x\n - sti-drm\n - mediatek-drm-hdmi\n - msm\n\nAs long as I review their codes relevant to the structure, the structure\nmembers are used just for condition statements and printk formats.\nMy proposal of change is a bit intrusive to the printk formats but this\nmay be acceptable.\n\nTotally, it's reasonable to use unsigned type for the structure members.\nThis bug is detected by Sparse, static code analyzer with below warnings.\n\n./include/sound/hdmi-codec.h:39:26: error: dubious one-bit signed bitfield\n./include/sound/hdmi-codec.h:40:28: error: dubious one-bit signed bitfield\n./include/sound/hdmi-codec.h:41:29: error: dubious one-bit signed bitfield\n./include/sound/hdmi-codec.h:42:31: error: dubious one-bit signed bitfield\n\nFixes: 09184118a8ab (\"ASoC: hdmi-codec: Add hdmi-codec for external HDMI-encoders\")\nSigned-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>\nAcked-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>\nSigned-off-by: Mark Brown <broonie@kernel.org>\nCC: stable@vger.kernel.org","distinct":false,"url":"https://api.github.com/repos/dhnkrn/drm-tip/commits/9e4d59ada4d602e78eee9fb5f898ce61fdddb446"},{"sha":"ef6503e8919430bb05bae2155b29fb62bcdf87b3","author":{"name":"Laurent Pinchart","email":"8b14580067f63df365ab75f40300acb6346a24eb@ideasonboard.com"},"message":"drm: Kbuild: add omap_drm.h to the installed headers\n\nThe header defines the userspace API exported by the omapdrm driver,\ninstall it to make the definitions available to userpace.\n\nSigned-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>\nReviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>","distinct":false,"url":"https://api.github.com/repos/dhnkrn/drm-tip/commits/ef6503e8919430bb05bae2155b29fb62bcdf87b3"},{"sha":"4d20dfc053c7e0b2d155cbc6cb0817717753e2b5","author":{"name":"Laurent Pinchart","email":"8b14580067f63df365ab75f40300acb6346a24eb@ideasonboard.com"},"message":"drm: omapdrm: fb: Limit number of planes per framebuffer to two\n\nThe only multi-planar format supported by the driver is NV12, there will\nthus never be more than two planes per framebuffer.\n\nSigned-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>\nReviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>","distinct":false,"url":"https://api.github.com/repos/dhnkrn/drm-tip/commits/4d20dfc053c7e0b2d155cbc6cb0817717753e2b5"},{"sha":"c9028b39597fbdcdac96641e12cc656a27c137c1","author":{"name":"Laurent Pinchart","email":"8b14580067f63df365ab75f40300acb6346a24eb@ideasonboard.com"},"message":"drm: omapdrm: fb: Use format information provided by the DRM core\n\nThe driver stores in a custom structure named format several pieces of\ninformation about the format that are available in the DRM core. Remove\nthem and get the information from the DRM core instead.\n\nSigned-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>\nReviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>","distinct":false,"url":"https://api.github.com/repos/dhnkrn/drm-tip/commits/c9028b39597fbdcdac96641e12cc656a27c137c1"},{"sha":"a39c94e8138f4708b92245a7021ad4d40376360f","author":{"name":"Laurent Pinchart","email":"8b14580067f63df365ab75f40300acb6346a24eb@ideasonboard.com"},"message":"drm: omapdrm: fb: Simplify objects lookup when creating framebuffer\n\nMerge the single-user objects_lookup inline function into its caller,\nallowing reuse of the error code path.\n\nSigned-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>\nReviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>","distinct":false,"url":"https://api.github.com/repos/dhnkrn/drm-tip/commits/a39c94e8138f4708b92245a7021ad4d40376360f"},{"sha":"6941e3d12b3284ea5b8d32b7023221700cad5f49","author":{"name":"Laurent Pinchart","email":"8b14580067f63df365ab75f40300acb6346a24eb@ideasonboard.com"},"message":"drm: omapdrm: fb: Simplify mode command checks when creating framebuffer\n\nThe hardware requires all planes to have an identical pitch in number of\npixels. Given that all supported formats use the same number of bytes\nper pixel in all planes, framebuffer creation checks can be simplified.\nThe implementations assumes that no format use more than two planes\nwhich is true with the existing hardware.\n\nSigned-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>\nReviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>","distinct":false,"url":"https://api.github.com/repos/dhnkrn/drm-tip/commits/6941e3d12b3284ea5b8d32b7023221700cad5f49"},{"sha":"a078a3ddc7209474e8dd827743390e9ed4bc6881","author":{"name":"Laurent Pinchart","email":"8b14580067f63df365ab75f40300acb6346a24eb@ideasonboard.com"},"message":"drm: omapdrm: fb: Turn framebuffer creation error messages into debug\n\nDon't print userspace parameters validation failures as error messages\nto avoid giving userspace the ability to flood the kernel log.\n\nSigned-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>\nReviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>","distinct":false,"url":"https://api.github.com/repos/dhnkrn/drm-tip/commits/a078a3ddc7209474e8dd827743390e9ed4bc6881"},{"sha":"728ae8dd696a483355b593487eba73f4c64f1152","author":{"name":"Laurent Pinchart","email":"8b14580067f63df365ab75f40300acb6346a24eb@ideasonboard.com"},"message":"drm: omapdrm: Handle FIFO underflow IRQs internally\n\nAs the FIFO underflow IRQ handler just prints an error message to the\nkernel log, simplify the code by not registering one IRQ handler per\nplane but print the messages directly from the main IRQ handler.\n\nSigned-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>\nReviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>","distinct":false,"url":"https://api.github.com/repos/dhnkrn/drm-tip/commits/728ae8dd696a483355b593487eba73f4c64f1152"}]}
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