{"action":"created","issue":{"url":"https://api.github.com/repos/raspberrypi/linux/issues/2286","repository_url":"https://api.github.com/repos/raspberrypi/linux","labels_url":"https://api.github.com/repos/raspberrypi/linux/issues/2286/labels{/name}","comments_url":"https://api.github.com/repos/raspberrypi/linux/issues/2286/comments","events_url":"https://api.github.com/repos/raspberrypi/linux/issues/2286/events","html_url":"https://github.com/raspberrypi/linux/issues/2286","id":276580305,"number":2286,"title":"RPI3/CM3: SPI clock dividers seem to be fixed to power of 2 when running at 400MHz vpu","user":{"login":"msperl","id":2638784,"avatar_url":"https://avatars2.githubusercontent.com/u/2638784?v=4","gravatar_id":"","url":"https://api.github.com/users/msperl","html_url":"https://github.com/msperl","followers_url":"https://api.github.com/users/msperl/followers","following_url":"https://api.github.com/users/msperl/following{/other_user}","gists_url":"https://api.github.com/users/msperl/gists{/gist_id}","starred_url":"https://api.github.com/users/msperl/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/msperl/subscriptions","organizations_url":"https://api.github.com/users/msperl/orgs","repos_url":"https://api.github.com/users/msperl/repos","events_url":"https://api.github.com/users/msperl/events{/privacy}","received_events_url":"https://api.github.com/users/msperl/received_events","type":"User","site_admin":false},"labels":[],"state":"open","locked":false,"assignee":null,"assignees":[],"milestone":null,"comments":4,"created_at":"2017-11-24T10:49:26Z","updated_at":"2017-11-24T12:26:19Z","closed_at":null,"author_association":"CONTRIBUTOR","body":"Hi!\r\n\r\nIs this a \"known\" feature of the SOC that the spi clock divider is limited to a power of 2 on a raspberry 3/CM3 (and actually rounding up the value)?\r\n\r\nObserved frequencies are 12.5MHz when requesting 20MHz (effective divider is 32) and 6.75 when requesting 10MHz (effective divider is 64).\r\n\r\nSurprisingly this is not the case when configuring: `core_freq=250` in boot.config.\r\nIn this case I get 17.85MHz and 9.6MHz SPI Clock rate respectively.\r\n\r\nOr is it maybe firmware related?\r\n\r\nThanks,\r\n                Martin\r\n\r\n"},"comment":{"url":"https://api.github.com/repos/raspberrypi/linux/issues/comments/346817778","html_url":"https://github.com/raspberrypi/linux/issues/2286#issuecomment-346817778","issue_url":"https://api.github.com/repos/raspberrypi/linux/issues/2286","id":346817778,"user":{"login":"msperl","id":2638784,"avatar_url":"https://avatars2.githubusercontent.com/u/2638784?v=4","gravatar_id":"","url":"https://api.github.com/users/msperl","html_url":"https://github.com/msperl","followers_url":"https://api.github.com/users/msperl/followers","following_url":"https://api.github.com/users/msperl/following{/other_user}","gists_url":"https://api.github.com/users/msperl/gists{/gist_id}","starred_url":"https://api.github.com/users/msperl/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/msperl/subscriptions","organizations_url":"https://api.github.com/users/msperl/orgs","repos_url":"https://api.github.com/users/msperl/repos","events_url":"https://api.github.com/users/msperl/events{/privacy}","received_events_url":"https://api.github.com/users/msperl/received_events","type":"User","site_admin":false},"created_at":"2017-11-24T12:26:19Z","updated_at":"2017-11-24T12:26:19Z","author_association":"CONTRIBUTOR","body":"OK, that calculation sounds reasonable.\r\n\r\nBut there is ONE big issue with what you are proposing for the spi and i2C drivers:\r\nAssume we start a long 64 (DMA) transfer at VPU=250MHz and then in the middle of the transfer the firmware decides to switch to to 400MHz.\r\n\r\nThat would increase the effective frequency  by a factor of 1.6 bringing the spi clock out of specs with the device.\r\n\r\nThe whole situation is tricky and would require more interaction between the SPI device and the firmware (or finally get the linux kernel to control the clocks for power states with a fallback in the firmware...).\r\n\r\nSo that also goes for the AUX devices (SPI1/2, uart), I2C, SPI, sdhost, but to some extend also to the PL11 serial port and dpi (both have two clocks defined).\r\n\r\nFor all practical purposes it seems that there is a requirement to keep the VPU fixed when using any of those ports outside of the firmware...\r\n\r\nOr what do you recommend instead?"}}
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