{"push_id":1861918613,"size":2,"distinct_size":2,"ref":"refs/heads/master","head":"066ac26ff717a72d1da3bb0ec331870781406e1c","before":"967721b9d5c594b98d14c59e794ba11fcfb8899c","commits":[{"sha":"2a487177d4e7c4705fb4503a6f3de4deccfc8587","author":{"name":"Ahmad Fatoum","email":"2545b03482e1bb477ffbdf46e324071fb16e4537@a3f.at"},"message":"Fail test if testbench causes assertion error\n\nPreviously, it only failed on misscompile.\nUser code is not allowed to write :(assertion error): to stderr\nin a joking manner.","distinct":true,"url":"https://api.github.com/repos/a3f/r3k.vhdl/commits/2a487177d4e7c4705fb4503a6f3de4deccfc8587"},{"sha":"066ac26ff717a72d1da3bb0ec331870781406e1c","author":{"name":"Ahmad Fatoum","email":"2545b03482e1bb477ffbdf46e324071fb16e4537@a3f.at"},"message":"Add combined testbench for stages IF/ID/EX/WB","distinct":true,"url":"https://api.github.com/repos/a3f/r3k.vhdl/commits/066ac26ff717a72d1da3bb0ec331870781406e1c"}]}
{"actor":{"display_login":"a3f"}}