{"push_id":1674282160,"size":35,"distinct_size":35,"ref":"refs/heads/master","head":"5586ed0e6871386c2839e07009bd62d5d0ac7af4","before":"8ffd54fef838784ef4388d48843cddf55246e529","commits":[{"sha":"8036809799c453b02f4c8fedbb5faaeb19af90c2","author":{"name":"Ilia Mirkin","email":"b2ef0ae728ba642680a7b0ef24aed39533e21358@alum.mit.edu"},"message":"nvc0: increase texture buffer object alignment to 256 for pre-GM107\n\nWe currently don't pass the low byte of the address via the surface\ninfo, so in order to work with images, these have to implicitly be\naligned to 256. The proprietary driver also doesn't go out of its way to\nprovide lower alignment.\n\nFixes GL45-CTS.texture_buffer.texture_buffer_texture_buffer_range\n\nSigned-off-by: Ilia Mirkin <imirkin@alum.mit.edu>\nCc: mesa-stable@lists.freedesktop.org\nReviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>","distinct":true,"url":"https://api.github.com/repos/FireBurn/mesa/commits/8036809799c453b02f4c8fedbb5faaeb19af90c2"},{"sha":"d9cc58d6ec56e676b1285508a4118a83f5325833","author":{"name":"Ilia Mirkin","email":"b2ef0ae728ba642680a7b0ef24aed39533e21358@alum.mit.edu"},"message":"nouveau: when mapping a persistent buffer, synchronize on former xfers\n\nIf the buffer is being used, we should wait for those uses to be\ncomplete before returning the map.\n\nFixes: GL45-CTS.direct_state_access.buffers_functional\nSigned-off-by: Ilia Mirkin <imirkin@alum.mit.edu>\nCc: mesa-stable@lists.freedesktop.org","distinct":true,"url":"https://api.github.com/repos/FireBurn/mesa/commits/d9cc58d6ec56e676b1285508a4118a83f5325833"},{"sha":"50b987c0f022d7297b3c97a3f8ec0b51c83e4454","author":{"name":"Kenneth Graunke","email":"e8e0e12ced052a7b04539107b6dfbe9787d38bd2@whitecape.org"},"message":"i965: Fix wonky indentation left by brw_bo_alloc_tiled rename.","distinct":true,"url":"https://api.github.com/repos/FireBurn/mesa/commits/50b987c0f022d7297b3c97a3f8ec0b51c83e4454"},{"sha":"ce0c8cf941e38b9d8b4d3284514feb36453d5e83","author":{"name":"Bas Nieuwenhuizen","email":"99bb905c4f884bf38b04075a0f5da8a4fd0bd599@basnieuwenhuizen.nl"},"message":"radv: Add occlusion query shader.\n\nAdds a shader for writing occlusion query results to a buffer, as the\nCP packet isn't support on SI or secondary buffers, and doesn't handle\nthe availability bit (or partial results) nor truncation to 32-bit.\n\nSigned-off-by: Bas Nieuwenhuizen <basni@google.com>\nReviewed-by: Dave Airlie <airlied@redhat.com>","distinct":true,"url":"https://api.github.com/repos/FireBurn/mesa/commits/ce0c8cf941e38b9d8b4d3284514feb36453d5e83"},{"sha":"8911dd6d1216cfb7b90df69d3576e11d4c619f31","author":{"name":"Bas Nieuwenhuizen","email":"99bb905c4f884bf38b04075a0f5da8a4fd0bd599@basnieuwenhuizen.nl"},"message":"radv: Use a shader for occlusion CmdCopyQueryPoolResults.\n\nUse the new occlusion query copy shader.\n\nWe don't use the shader for the waiting as a polling loop ineracts badly\nwith having caching enabled. I noticed on my GPU (Tonga) that the values\nare written out in order, so I just use a WAIT_REG_MEM on the last value.\n\nIf it turns out other chips don't do that we may need to look a bit more\ninto this. Having 8 WAIT_REG_MEM packets per query doesn't sound ideal.\n\nThis also restricts the availability word in the pool to timestamp queries\nonly, as occlusion queries don't use it, and pipeline statistic queries\nlikely won't either.\n\nSigned-off-by: Bas Nieuwenhuizen <basni@google.com>\nReviewed-by: Dave Airlie <airlied@redhat.com>","distinct":true,"url":"https://api.github.com/repos/FireBurn/mesa/commits/8911dd6d1216cfb7b90df69d3576e11d4c619f31"},{"sha":"95743d5b884515017f8e03afe1a3470989903835","author":{"name":"Bas Nieuwenhuizen","email":"99bb905c4f884bf38b04075a0f5da8a4fd0bd599@basnieuwenhuizen.nl"},"message":"radv: Use VK_WHOLE_SIZE for the query buffer bindings.\n\nThe buffer sizes are specified just a few lines earlier, so don't\nrepeat ourselves.\n\nSigned-off-by: Bas Nieuwenhuizen <basni@google.com>\nReviewed-by: Dave Airlie <airlied@redhat.com>","distinct":true,"url":"https://api.github.com/repos/FireBurn/mesa/commits/95743d5b884515017f8e03afe1a3470989903835"},{"sha":"847319376085b7af249a1c1542663d55d669dfb8","author":{"name":"Bas Nieuwenhuizen","email":"99bb905c4f884bf38b04075a0f5da8a4fd0bd599@basnieuwenhuizen.nl"},"message":"radv: Rename query pipeline/set layout.\n\nFor using them with both occlusion and pipeline statistics queries.\n\nSigned-off-by: Bas Nieuwenhuizen <basni@google.com>\nReviewed-by: Dave Airlie <airlied@redhat.com>","distinct":true,"url":"https://api.github.com/repos/FireBurn/mesa/commits/847319376085b7af249a1c1542663d55d669dfb8"},{"sha":"d2906bc72db6ce33c1f7af5f7f015a4cdfef0862","author":{"name":"Bas Nieuwenhuizen","email":"99bb905c4f884bf38b04075a0f5da8a4fd0bd599@basnieuwenhuizen.nl"},"message":"radv: Let count be dynamic in radv_break_on_count.\n\nSigned-off-by: Bas Nieuwenhuizen <basni@google.com>\nReviewed-by: Dave Airlie <airlied@redhat.com>","distinct":true,"url":"https://api.github.com/repos/FireBurn/mesa/commits/d2906bc72db6ce33c1f7af5f7f015a4cdfef0862"},{"sha":"8475a14302eaf0ff3c6a6c37dd87471a8ab73d84","author":{"name":"Bas Nieuwenhuizen","email":"99bb905c4f884bf38b04075a0f5da8a4fd0bd599@basnieuwenhuizen.nl"},"message":"radv: Implement pipeline statistics queries.\n\nThe devil is in the shader again, otherwise this is\nfairly straightforward.\n\nThe CTS contains no pipeline statistics copy to buffer\ntestcases, so I did a basic smoketest.\n\nSigned-off-by: Bas Nieuwenhuizen <basni@google.com>\nReviewed-by: Dave Airlie <airlied@redhat.com>","distinct":true,"url":"https://api.github.com/repos/FireBurn/mesa/commits/8475a14302eaf0ff3c6a6c37dd87471a8ab73d84"},{"sha":"29082b0b22606b1a2bf3b515ab43d3a2857bb78d","author":{"name":"Samuel Pitoiset","email":"1d2a4096352da3fb1923446a553692059655b1d6@gmail.com"},"message":"glsl: use the BA1 macro for textureCubeArrayShadow()\n\nFor both consistency and new bindless sampler types.\n\nSigned-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>\nReviewed-by: Timothy Arceri <tarceri@itsqueeze.com>","distinct":true,"url":"https://api.github.com/repos/FireBurn/mesa/commits/29082b0b22606b1a2bf3b515ab43d3a2857bb78d"},{"sha":"981ba1c89bdb24c292b85f1ac964cf55f60b1a6b","author":{"name":"Samuel Pitoiset","email":"1d2a4096352da3fb1923446a553692059655b1d6@gmail.com"},"message":"glsl: use the BA1 macro for textureSamples()\n\nFor both consistency and new bindless sampler types.\n\nSigned-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>\nReviewed-by: Timothy Arceri <tarceri@itsqueeze.com>","distinct":true,"url":"https://api.github.com/repos/FireBurn/mesa/commits/981ba1c89bdb24c292b85f1ac964cf55f60b1a6b"},{"sha":"768f81b62ba0901b766494af7a29ba9deee83338","author":{"name":"Samuel Pitoiset","email":"1d2a4096352da3fb1923446a553692059655b1d6@gmail.com"},"message":"glsl: use the BA1 macro for textureQueryLevels()\n\nFor both consistency and new bindless sampler types.\n\nSigned-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>\nReviewed-by: Timothy Arceri <tarceri@itsqueeze.com>","distinct":true,"url":"https://api.github.com/repos/FireBurn/mesa/commits/768f81b62ba0901b766494af7a29ba9deee83338"},{"sha":"37622ecc795e655ab0264c44dbe6188d9d9d3813","author":{"name":"Lucas Stach","email":"18740b0c8812902fa5e7e7dee32da7993c16a6aa@pengutronix.de"},"message":"etnaviv: avoid using invalid TS\n\nThe TS is only valid after it has been initialized by a fast\nclear, so it should not be taken into account when blitting\nresources that haven't been cleared. Also the blit itself\ninvalidates the destination TS, as it's not updated and will\nretain data from the previous rendering after the blit.\n\nSigned-off-by: Lucas Stach <l.stach@pengutronix.de>\nReviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>","distinct":true,"url":"https://api.github.com/repos/FireBurn/mesa/commits/37622ecc795e655ab0264c44dbe6188d9d9d3813"},{"sha":"52f6c8cc31f553ba2005892fcf2ca9b5f10bac91","author":{"name":"Lucas Stach","email":"18740b0c8812902fa5e7e7dee32da7993c16a6aa@pengutronix.de"},"message":"etnaviv: align TS surface size to number of pixel pipes\n\nThe TS surface gets cleared by a tiled RS fill. If the chip has\nmore than 1 pixel pipe the size of the TS surface needs to be\naligned so that each pipe address matches a tile start, otherwise\nthe RS will hang.\n\nSigned-off-by: Lucas Stach <l.stach@pengutronix.de>\nReviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>","distinct":true,"url":"https://api.github.com/repos/FireBurn/mesa/commits/52f6c8cc31f553ba2005892fcf2ca9b5f10bac91"},{"sha":"797890bbbd3b4d5415005af782244b255cb9c488","author":{"name":"Lucas Stach","email":"18740b0c8812902fa5e7e7dee32da7993c16a6aa@pengutronix.de"},"message":"etnaviv: enable TS also on sampler resources\n\nFixes a performance issue with imported winsys buffers as those are\nmarked with binding sampler view.\n\nThis might require a TS flush on single pipe chips that directly\nsample from the rendered buffer, but otherwise seems to work fine.\n\nSigned-off-by: Lucas Stach <l.stach@pengutronix.de>\nReviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>","distinct":true,"url":"https://api.github.com/repos/FireBurn/mesa/commits/797890bbbd3b4d5415005af782244b255cb9c488"},{"sha":"4ee7c2c2843cc82d17da18d95b3ded4db1dc54e4","author":{"name":"Lucas Stach","email":"18740b0c8812902fa5e7e7dee32da7993c16a6aa@pengutronix.de"},"message":"etnaviv: enable TS, but disable autodisable\n\nAutodisable seems to cause missed rendering in some cases, but\notherwise TS seems to work properly.\n\nSigned-off-by: Lucas Stach <l.stach@pengutronix.de>\nReviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>","distinct":true,"url":"https://api.github.com/repos/FireBurn/mesa/commits/4ee7c2c2843cc82d17da18d95b3ded4db1dc54e4"},{"sha":"8d7a82ae321e6316a7ab521a24f9cf569b9bd0c3","author":{"name":"Juan A. Suarez Romero","email":"8331b54e04830d4ad82394200de3f5da2c26e186@igalia.com"},"message":"anv: remove needless VALGRIND_MAKE_MEM_DEFINED\n\nThis is already invoked in the following VG_NOACCESS_READ() call.\n\nReviewed-by: Jason Ekstrand <jason@jlekstrand.net>","distinct":true,"url":"https://api.github.com/repos/FireBurn/mesa/commits/8d7a82ae321e6316a7ab521a24f9cf569b9bd0c3"},{"sha":"02ccd8f52cffcc25e5fefdd0f900cf04230395f4","author":{"name":"Kenneth Graunke","email":"e8e0e12ced052a7b04539107b6dfbe9787d38bd2@whitecape.org"},"message":"i965: Set kernel features before computing max GL version.\n\nWe check these bitfields when computing the Haswell max GL version.\nWe need to set them ahead of time, or they won't exist, and all our\nchecks will fail.  That sets the max core profile GL version to 4.2.\n\nThis introduces the bizarre situation where asking for a GL context\nwith version 4.3+ fails, but asking for a GL core profile context\nwith version <= 4.2 actually promotes you a 4.5 context.\n\nGLX_MESA_query_renderer also reported the bogus 4.2 value.\nNow it shows 4.5.\n\nCc: \"17.0\" <mesa-stable@lists.freedesktop.org>\nReported-and-tested-by: Rafael Ristovski <rafael.ristovski@gmail.com>","distinct":true,"url":"https://api.github.com/repos/FireBurn/mesa/commits/02ccd8f52cffcc25e5fefdd0f900cf04230395f4"},{"sha":"9a7b257450fdcb8ae2c998caf24af040722a541a","author":{"name":"Tim Rowley","email":"8f5e6de09de66e68b6e3e20be2b7771eb1beea5a@intel.com"},"message":"swr: return true for PIPE_CAP_DOUBLES\n\nReviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>","distinct":true,"url":"https://api.github.com/repos/FireBurn/mesa/commits/9a7b257450fdcb8ae2c998caf24af040722a541a"},{"sha":"147e71242ce539ff28e282f009c332818c35f5ac","author":{"name":"Francisco Jerez","email":"475862461d4f628eb34c6ff59c62fa061400c9c5@riseup.net"},"message":"i965/fs: Take into account lower frequency of conditional blocks in spilling cost heuristic.\n\nThe individual branches of an if/else/endif construct will be executed\nsome unknown number of times between 0 and 1 relative to the parent\nblock.  Use some factor in between as weight while approximating the\ncost of spill/fill instructions within a conditional if-else branch.\nThis favors spilling registers used within conditional branches which\nare likely to be executed less frequently than registers used at the\ntop level.\n\nImproves the framerate of the SynMark2 OglCSDof benchmark by ~1.9x on\nmy SKL GT4e.  Should have a comparable effect on other platforms.  No\nsignificant regressions.\n\nReviewed-by: Jason Ekstrand <jason@jlekstrand.net>\nReviewed-by: Kenneth Graunke <kenneth@whitecape.org>\nReviewed-by: Matt Turner <mattst88@gmail.com>","distinct":true,"url":"https://api.github.com/repos/FireBurn/mesa/commits/147e71242ce539ff28e282f009c332818c35f5ac"}]}
{"actor":{"display_login":"FireBurn"}}