{"action":"created","issue":{"url":"https://api.github.com/repos/m-labs/migen/issues/84","repository_url":"https://api.github.com/repos/m-labs/migen","labels_url":"https://api.github.com/repos/m-labs/migen/issues/84/labels{/name}","comments_url":"https://api.github.com/repos/m-labs/migen/issues/84/comments","events_url":"https://api.github.com/repos/m-labs/migen/issues/84/events","html_url":"https://github.com/m-labs/migen/pull/84","id":271175487,"number":84,"title":"Icestorm Backend Improvements","user":{"login":"cr1901","id":6418027,"avatar_url":"https://avatars3.githubusercontent.com/u/6418027?v=4","gravatar_id":"","url":"https://api.github.com/users/cr1901","html_url":"https://github.com/cr1901","followers_url":"https://api.github.com/users/cr1901/followers","following_url":"https://api.github.com/users/cr1901/following{/other_user}","gists_url":"https://api.github.com/users/cr1901/gists{/gist_id}","starred_url":"https://api.github.com/users/cr1901/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/cr1901/subscriptions","organizations_url":"https://api.github.com/users/cr1901/orgs","repos_url":"https://api.github.com/users/cr1901/repos","events_url":"https://api.github.com/users/cr1901/events{/privacy}","received_events_url":"https://api.github.com/users/cr1901/received_events","type":"User","site_admin":false},"labels":[],"state":"open","locked":false,"assignee":null,"assignees":[],"milestone":null,"comments":1,"created_at":"2017-11-04T08:14:05Z","updated_at":"2017-11-09T09:08:14Z","closed_at":null,"author_association":"CONTRIBUTOR","pull_request":{"url":"https://api.github.com/repos/m-labs/migen/pulls/84","html_url":"https://github.com/m-labs/migen/pull/84","diff_url":"https://github.com/m-labs/migen/pull/84.diff","patch_url":"https://github.com/m-labs/migen/pull/84.patch"},"body":"# Overview\r\nThis PR updates the Icestorm backend to take advantage of new features in `arachne-pnr`, as well as add some features present in the other backends that I omitted from my initial commits.\r\n\r\nIn particular:\r\n* Icestorm now supports Migen-style attributes. Currently, only `keep` is implemented and meaningful. Changes related to timing constraints such as false paths will have to wait until `arachne-pnr`/`icetime` supports them.\r\n* The `lp384`, `lp1k`, `lp8k` FPGA targets are now supported, as well as the corresponding packages. The naming convention for platforms changed from `1k`/`8k` to `hx1k`/`lp1k` etc, but this is normally invisible to the user.\r\n* `AsyncResetSynchronizer` and `DifferentialOutput` are implemented.\r\n* `flake8` has been run on all touched files.\r\n* Output `yosys` script can now be modified (save for `attrmap`, default is identical to before this PR).\r\n\r\n## Migen Attribute Translation\r\nAn extra `attrmap` passed was added to the output `yosys` script. This is because `yosys` [will treat](https://github.com/cliffordwolf/yosys/blob/master/frontends/verilog/verilog_parser.y#L209-L221) \"true\"/\"false\" as a string attribute, rather than a bool attribute, and Migen [only supports](https://github.com/m-labs/migen/blob/master/migen/fhdl/verilog.py#L185) string attributes. This will confuse `yosys`, which will [eventually](https://github.com/cliffordwolf/yosys/blob/f9d023c53fedd96ec1b9d3a93d0448291a1f2527/kernel/rtlil.cc#L97-L103) attempt to parse the first char of the string as a bool.\r\n\r\n## Notes on I/O and ResetSync Wrappers\r\n`AsyncResetSynchronizer`: Implemented using the equivalent primitive for SiliconBlue\r\nas the Xilinx version.\r\n\r\n`DDRInput`/`DDROutput`: Not implemented, as there's no primitive for separate `DDRInput` and `DDROutput`. All DDR functions are provided by the SB_IO primitive and are expected to route directly to\r\nan FPGA pin. Xilinx and Diamond impls of `DDRInput`/`DDROutput` are coded such that the\r\ninputs/`DDROutput`s to `DDRInput`/`DDROutput` are unidirectional and can connect to other\r\nprimitives on the way to the I/O pin. IMO, it's best to just implement both\r\nmanually on ice40 if you need it.\r\n\r\n`DifferentialOutput`: Already supported by Migen by using two single-ended I/Os and\r\na resistor. The SB_IO primitive is required (see page 16 of \r\n\"Using Differential I/O (LVDS, Sub-LVDS) in iCE40 LP/HX Devices\"), and the\r\noutput is of type `inout`. In practice, `self.comb += [o_p.eq(i), o_n.eq(~i)]`\r\nalso probably works. I don't think the requirement to route\r\ndifferential I/O directly to an I/O pad in Migen is unique to ice40 though\r\n(let me know if I'm wrong).\r\n\r\n`DifferentialInput`: Not supported at all in Migen. The place-and-route (both arachne and\r\nIceCube) are expected to implicitly instantiate the second I/O pin of a differential pair. I'm unsure\r\nhow to reprsent an implicit pin resource usage in Migen. Not to mention,\r\nI'm not intimately familiar with the structure of ice40 to determine how arachne\r\n\"finds\" the other pin."},"comment":{"url":"https://api.github.com/repos/m-labs/migen/issues/comments/343091596","html_url":"https://github.com/m-labs/migen/pull/84#issuecomment-343091596","issue_url":"https://api.github.com/repos/m-labs/migen/issues/84","id":343091596,"user":{"login":"jordens","id":1338946,"avatar_url":"https://avatars1.githubusercontent.com/u/1338946?v=4","gravatar_id":"","url":"https://api.github.com/users/jordens","html_url":"https://github.com/jordens","followers_url":"https://api.github.com/users/jordens/followers","following_url":"https://api.github.com/users/jordens/following{/other_user}","gists_url":"https://api.github.com/users/jordens/gists{/gist_id}","starred_url":"https://api.github.com/users/jordens/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/jordens/subscriptions","organizations_url":"https://api.github.com/users/jordens/orgs","repos_url":"https://api.github.com/users/jordens/repos","events_url":"https://api.github.com/users/jordens/events{/privacy}","received_events_url":"https://api.github.com/users/jordens/received_events","type":"User","site_admin":false},"created_at":"2017-11-09T09:08:14Z","updated_at":"2017-11-09T09:08:14Z","author_association":"OWNER","body":"This is fine (i.e. not worse than the other platforms). But maybe we can seize this (i.e. Lattice/Diamond/Yosys) to set an example of a really clean platform/toolchain to test cleanup ideas on."}}
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