# Is the ‘Finite Bias Anomaly’ in planar GaAs-Superconductor junctons caused by point-contact like structures?

## I Introduction

The current-voltage (I-V) relation of normal metal -superconductor (NS) interfaces - is strongly modified both by wave interference phenomena (producing quasi-bound Andreev levels) and ballistic transport at the interface. Several groups have observed such novel superconducting phenomena at the NS interface between a superconductor and semiconductor -. Based on the success of Marsh et al. - in fabricating In and Sn ‘alloyed’ contacts to a two-dimensional electron gas (2DEG) formed at the AlGaAs/GaAs interface, we have studied ‘alloyed’ In contacts to the 2DEG. We find the mechanism for producing highly transmissive NS contacts is In growth into the AlGaAs ‘guided’ along a preferred crystallographic direction. For an AlGaAs/GaAs heterojunction with a  oriented surface, we find that In growth into the AlGaAs occurs preferentially along the {111} crystallographic planes. This unusual type of In growth into the AlGaAs produces an ‘inverted pyramid’ or ‘field emission’ point contact tip as shown in Fig. 1(a). Similar microstructure for metallic contacts to GaAs has been observed for both AuGeNi  and Au  metallizations. This guiding of In into the AlGaAs also allows the In to maintain its superconducting properties. An AlInGaAs alloy, formed by diffusing In into AlGaAs, would simply be a normal metal.

For such a crystallographically defined point contact metallization, we find the closer one can grow the tip of the point contact to the 2DEG without contacting it, the higher the transmission coefficient of an electron incident from the NS contact into the 2DEG. For such nearly ballistic transport through the NS junction, a corresponding excess current results . Growing the In down into direct contact with the 2DEG, on the other hand, results in a low-transmission normal metal - insulator - superconductor (NIS) contact and its corresponding Giaever tunneling I-V characteristic . We postulate that In in direct contact with the 2DEG depletes the electrons around it, forcing the superconducting electrons to tunnel through a large depletion layer near the contact, shown schematically in Fig. 1(b). Electron depletion around a metallic contact to GaAs is commonly known as a Schottky barrier. A similar mechanism for forming highly transmissive AuGeNi contacts to GaAs was originally postulated by Braslau -. This mechanism for forming highly transmissive tunneling type AuGeNi contacts to GaAs is the reason some AlGaAs/GaAs heterojunction transistors can operate at low temperatures with low contact resistance.

In this paper we correlate transmission electron microscope (TEM) photographs of the superconducting In contacts to the resulting I-V characteristics of the NS junctions. All the different $`dI/dV`$ characteristics shown in this paper are from nominally identical samples, grown and prepared from the same GaAs wafer at the same time. The only differences between the samples is in post process contact annealing, and hence in the contact geometry.

Changes in contact geometry produce widely different $`dI/dV`$ characteristics. In point contacts grown near the 2DEG result in ballistic transport of electrons through the NS contact and an excess current. In in direct contact with the 2DEG produces lower transmission contacts and Giaever tunneling. Since the GaAs semiconductor forming the normal metal is also weakly localized, we are able to observe weak localization corrections to Giaever tunneling . In In/GaAs junctions where some region of the contact is transmissive, that portion of the contact will produce a conductance drop around zero bias . The incoherent addition of the conductance from different regions of the same ‘contact’ could therefore generate the ‘finite bias anomaly’ seen in Ref. .

## II Formation of the NS Contact

A cross section of the unnannealed In/GaAs heterostructure is shown in Fig. 2(a). An undoped Al<sub>0.3</sub>Ga<sub>0.7</sub>As spacer layer, followed by a Si doped Al<sub>0.3</sub>Ga<sub>0.7</sub>As layer and a 50 $`A^o`$ protective Si doped GaAs layer, was grown on an undoped (semi-insulating) (100) GaAs substrate. The resulting mobility of the 2DEG at liquid nitrogen temperature was about 125,000 $`cm^2`$/$`Vs`$. The In contacts were deposited by thermal evaporation and liftoff. A top view of the device is shown in Fig. 2(b). Two In pads, each of dimension 3.2mm$`X`$2.5mm and seperated by a nominal gap of 4$`\mu `$, were deposited on top of the heterostructure using thermal evaporation lift off. After annealing, we diffused In through the AlGaAs barrier layer to contact the 2DEG. The annealing temperature was varied between 500<sup>o</sup>C and 600<sup>o</sup>C. For temperatures of 450<sup>o</sup>C or less the In failed to contact the 2DEG, while annealing temperatures greater than 700<sup>o</sup>C caused thermal deterioration of the interface. Large In grains, 1-2 microns in diameter, grew on the contacts after annealing.

A TEM micrograph of Sample 1, annealed for a relatively short duration e.g. at 550 $`{}_{}{}^{o}C`$ for 2 minutes, is shown in Fig. 3(a). Fig. 3(a) shows that Indium starts growing into (100) AlGaAs/GaAs preferentially along the $`<`$111$`>`$ directions. The growth seems to be guided by the {111} crystallographic planes of GaAs inclined at angles of about 55<sup>o</sup> to the surface. Therefore for short annealing times we get ‘spikes’ of Indium descending towards the interface, forming an array of point contacts pictured in Fig. 3(a). The spikes are rather non-uniform in size and irregular in their penetration depths, probably nucleating at defects in the suface oxide of AlGaAs. In grain growth on the wafer surface therefore has little effect on the final microstructure and geometry of the NS contact. The net total conductance of the junction is determined by the sum of the conductance of all the point contacts in parallel. This growth mechanism is similar to that for alloyed Au-Ge-Ni contacts with GaAs  in which most of the conduction is through isolated Ge rich islands formed on the GaAs.

A TEM micrograph of Sample 2, annealed at 550<sup>o</sup>C for 6 minutes and then at 650<sup>o</sup>C for 3 minutes, is shown in Fig. 3(b). For the longer annealing times and higher annealing temperatures used in sample 2, more such In spikes grow from the deposited In contact. Fig. 3(b) shows these In spikes coalesce and penetrate completely through the AlGaAs/GaAs interface to physically touch the 2DEG, as depicted schematically in Fig. 1(b). The conductance characteristics of Samples 1 and 2 differ dramatically as described in the next section.

A high magnification TEM photograph of one of the inverted pyramid type In spikes in Sample 1 is shown in Fig. 4. The (100) GaAs surface is towards the top of Fig. 4. The penetration of In into the AlGaAs is clearly guided by {111} crystallographic planes. One can see in the high resolution TEM picture that the In indeed follows the {111} AlGaAs planes for several atoms. The In-AlGaAs boundary then moves abruptly along the  direction for 1-2 atoms before continuing along the {111} planes. The detailed TEM picture in Fig. 4 shows that while the {111} planes strongly guide the growth of In into (100), the In does not exactly follow those planes. However, the overall structure of the In contacts still resembles a point contact.

## III Current-Voltage Characteristics

Hall measurements were made on the 2DEG at the interface at a temperature of 400 mK. From the slope of transverse resistance $`R_{xy}`$ we estimate the carrier density to be $`1.8X10^{11}`$ $`cm^2`$. The mobility was 215,000 $`cm^2/Vs`$ which yielded a mean free path $`l`$ of about 0.4 $`\mu `$. From the low-field magnetoresistance, we estimate the phase breaking length $`l_\varphi `$ to be about 1.6 $`\mu `$, which is less than the 4 $`\mu `$m separation between the two In pads in Fig. 2(b). We conclude that the conductance of the devices is essentially equivalent to two NS junctions in series separated by a series resistor (the 2DEG).

### A NS Junction with an excess current

In Fig. 5(a) we show the conductance characteristics of Sample 1 at a base temperature of 100 mK. Fig. 5(a) shows an increase in conductance of about 10-12% around a range of $`\pm `$ 6mV. The 10-12% excess conductance around zero voltage shows that the junction behaves like a moderately transmissive junction , with the majority of the diffused Indium spikes forming transmissive interfaces with the 2DEG of the GaAs. The large oscillations of the conductance in Fig. 5(a) are reproducible with thermal recycling of the device. The oscillations are therefore likely a consequence of electron wave interference due to scattering from the fixed In point contacts to the 2DEG. The parasitic resistance of the 2DEG in series with the two NS junctions stretches the dI/dV versus V characteristics along the voltage axis, and also suppresses any changes observed along the dI/dV axis. Series resistance of the 2DEG explains why we observe only a 10-12% excess conductance instead of an excess conductance approaching 100% in Fig. 5(a).

We can crudely estimate the interface transmission in Fig. 5(a) by comparing it to an ideal, ballistic NS junction . A perfectly transmissive interface shows a 100% rise of conductance when the voltage bias satisfies $`|eV|\mathrm{\Delta }`$, where $`2\mathrm{\Delta }`$ superconducting energy gap . Setting $`2\mathrm{\Delta }=`$ 6mV (for two NS junctions in series), and using the BCS formula $`2\mathrm{\Delta }=3.5k_BT_c`$, gives a critical temperature $`T_c=20`$K. Since the actual critical temperature of the contacts is about $`3.4`$K, we infer a 1mV drop across the two NS interfaces and 5mV across the semiconductor. The total conductance at the gap voltage can be read directly from Fig. 5(a) as about 9mS, from which we infer a series resistance of about 92.6$`\mathrm{\Omega }`$ and a resistance of the two NS interfaces in series of about 18.5$`\mathrm{\Omega }`$ (when the voltage across the NS interface is less than the energy gap). When the voltage across the two NS interfaces is large, we can read directly off Fig. 5(a) a conductance of about 7.75mS, or a total resistance of about 129$`\mathrm{\Omega }`$. Subtracting the series resistance, we see the device resistance changes from 18.5$`\mathrm{\Omega }`$ when $`V_{\mathrm{interface}}\mathrm{\Delta }`$ to about 36.4$`\mathrm{\Omega }`$ when $`V_{\mathrm{interface}}\mathrm{\Delta }`$, roughly a 97% increase in background conductance. Since strong wave interference is present in Fig. 5(a), this comparison should be regarded as giving an order of magnitude estimate. However, after correcting for series resistance, this estimate indicates the junction in Fig. 5(a) is a nearly ballistic NS interface.

### B Giaever-type Tunnel Junctions

In Fig. 5(b) we show the differential conductance for Sample 2 at a temperature of 400mK. The differential conductance is suppressed around zero voltages, indicating Giaever tunneling and a lower transmission contact. We can conclude from Figs. 1 and 5 that In in intimate contact with the 2DEG forms a relatively low transmission contact, whereas In nearby but not directly in contact with the 2DEG forms a high transmission contact. The temperature dependence of the differential conductance for Samples 1 and 2 is also consistent with a ballistic contact and a low transmission contact, respectively. The differential conductance of Sample 1 is relatively constant with temperature, while the differential conductance of Sample 2 greatly decreases as the temperature is lowered (indicating thermionic emission).

We have taken several NS contacts displaying Giaever tunneling at low temperature and annealed them for longer times, attempting to obtain a ballistic NS interface. In all cases further annealing simply makes the Giaever tunneling characteristic more pronounced, indicating that further annealing lowers the interface transmission. The room temperature conductance of the sample improves with further annealing, however, simply due to an increase of the effective contact area. Since the room temperature conduction mechanism through the contact of Sample 2 is thermionic emission, it simply scales with the contact area. Further annealing improves the room temperature conductance, but worsens the low temperature conductance. There is an optimal annealing time where In grows down to almost reach the 2DEG, but is not in physical contact with the 2DEG. Any further annealing after this point degrades interface transmission.

### C Effect of Weak Localization on Giaever Tunneling

For an NS junction of length L, obeying the condition $`lLl_\varphi `$, electrons which initially failed to Andreev refelct from the NS interface can backscatter again to the NS interface. Therefore, weak localization inside the normal conductor gives the electrons additional opportunities for Andreev reflection. The net effect of Giaever tunneling at the NS junction combined with weak localization inside the normal conductor is an enhancement of the total Andreev reflection probability at the Fermi level, leading to an additional conductance peak around zero bias voltage .

Fig. 6 shows the differential conductance for the NS junction annealed at 550<sup>o</sup>C for 3 minutes, which we call Sample 3. Sample 3 displays the conductance peak around zero bias voltage first observed in Ref.  and explained in Ref. . Disorder assisted backscattering can cause a zero bias conductance peak of magnitude up to 10% of the background conductance value. In our case the zero bias peak is about a 1.5% increase over the background conductance. The Giaever tunneling feature is also spread over a large voltage range larger than 1mV. Parasitic resistance from the 2DEG again explains the smaller zero bias conductance peak and the spreading out of the dI/dV versus V along the voltage axis. Since the height of the zero bias conductance peak saturates by 300 mK Fig. 6(a), the peak is not the precursor of a supercurrent between the two contacts. The supercurrent should be negligibly small in any case, since the sample satisfies $`lLl_\varphi `$. We adequately filtered RF noise away from the devices to observe supercurrents in other superconductor - semiconductor samples with closer pad separation. We would also have observed such a supercurrent if it were present in this sample.

Fig. 6(b) shows the magnetic field dependence of the conductance for Sample 3. For a junction of length L and width W, where $`L,W>L_\varphi `$, the magnetic field required to destroy this zero bias conductance peak is of the order $`B_c=\varphi _0/L_{\varphi }^{}{}_{}{}^{2}`$. In Sample 3 we observe $`B_c`$ 80 Gauss. The calculated field is $`B_c`$ 20 Gauss, nearly four times smaller than the observed value. It is possible that the $`L_\varphi `$ is overestimated, i.e. it may be around $`L_\varphi `$ 0.8 $`\mu `$m. Since these numbers are not precise data fits based on any quantitative theory, it is comforting that we obtain roughly the coherence length obtained by previous weak localization measurements on the 2DEG. The shift in the background conductance with the magnetic field in Fig. 6(b) is also due to the parasitic magnetoresistance of the 2DEG.

### D Anamalous Weak Localization Corrections to Giaever Tunneling

On most samples where we observed weak localization corrections to Giaever tunneling, we obtained conductance characteristics similar to those in Fig. 6. However, Fig. 7 shows the conductance characteristics for an NS junction annealed at 500<sup>o</sup> C for 2 minutes which we call Sample 4. Overall Sample 4 displays a background of Giaever tunneling. A zero bias conductance peak (similar to the one in Fig. 6) continues to develop for temperatures down to about 800 mK in Fig. 7(a). At a temperature of 650 mK in Fig. 7(a), however, a conductance dip begins developing around zero bias. This dip in conductance around zero bias, which is superposed on the broader conductance peak, is nearly fully developed by 300 mK as shown in Fig. 7(a). There is little change in the differential conductance between 300 mK and 180 mK in Fig. 7(a). This anomalous dip feature superimposed on the weak localization correction to Giaever tunneling is reproducible on thermally cycling the NS junction back to room temperature and again down to mK temperatures.

Marmorkos, Beenakker, and Jalabert  have numerically simulated the conductance of an NS junction in contact with a dirty normal metal. For low transmission interfaces they numerically observe, in Fig. 2 of Ref. , the zero bias conductance peak associated with the weak localization corrections to Giaever tunneling. However, for high transmission between the NS interface and normal conductor, the numerical simulations of Ref.  reveal that the conductance peak changes into a conductance dip around zero bias. Ref.  therefore shows that the same weak localization phenomena which causes a zero bias conductance peak in low transmission contacts causes a zero bias conductance dip for highly transmissive NS interfaces.

The numerical simulation in Ref.  offers one possible way to explain the conductance dip around zero bias we observe in Sample 4. The overall conductance of Sample 4 displays Giaever tunneling. Therefore, the majority of the NS interface area in Sample 4 has an additional tunneling barrier between the superconductor and 2DEG, namely the depletion region shown in Fig. 1(b). However, the type of NS junctions we form by diffusion In into AlGaAs/GaAs are inhomogeneous enough that a significant fraction of the sample can form a transmissive NS interface of the type shown in Fig. 1(a). The conductance we observe in Fig. 7 will be a parallel combination of these two different types of NS junctions, as shown schematically in Fig. 8. For voltages away from $`V=0`$, the slow variation of the background Giaever tunneling conductance dominates the dI/dV curve. For voltages very close to zero bias, the weak localization phenomena at the transmissive regions dominate and leads to the observed conductance peak and dip.

The peak at finite bias in Figs. 7 was first observed by Poirier et al. , who called it the ‘finite bias anomaly’. One problem with using the simulations of Mormorkos et al. to explain a conductance dip around zero bias is that it requires a high interface transmission, whereas the data of Poirier et al.  (and our own data) show a Giaever tunneling background (low average interface transmission). The inherent inhomogeneity of supposedly planar superconducting In contacts to the 2DEG in AlGaAs/GaAs we have demonstrated in this paper overcomes this difficulty. A few high transmission point emitters can produce the conductance dip around zero bias, whereas the majority of the contact can maintain low overall interface transmissivity. The weak localization dip around zero bias can therefore peacefully coexist with a Giaever tunneling background conductance.

The weak localization correction to the conductance of a ballistic NS junction could have been more clearly observed in Sample 1, were it actually present in that sample. Similarly Sample 2 (and several other samples we measured) did not exhibit the weak localization correction to the Giaever tunneling conductance. The exact impurity configuration near a particular NS interface will determine whether or not the weak localization correction to the conductance appears in any given sample. Perhaps it is therefore not surprising that the weak localization correction to the conductance can be observed only in a fraction of the samples.

A different mechanism which splits the zero bias conductance peak in NI<sub>1</sub>NI<sub>2</sub>S junctions was developed in Ref. . Weak localization inside the middle N region produces the zero bias conductance peak. If the two insulators I<sub>1</sub> and I<sub>2</sub> have two different transmission coefficients, the zero bias conductance peak is split as shown in Fig. 3 of Ref. . These two barriers, having different transmissivity, is the same mechanism proposed by Poirier et al.  to account for the ‘finite bias anomaly’. Ref.  proposed a model which used the Schottky barrier at the NS interface to produce I<sub>2</sub>, and an impurity inside the semiconductor as I<sub>1</sub>. The spacing between I<sub>1</sub> and I<sub>2</sub> is L, a random number set by the impurity configuration. The McMillan-Rowell resonance nearest the Fermi level survives in the conductance of an NI<sub>1</sub>NI<sub>2</sub>S junction upon averaging over different L, producing a finite bias anomaly whose voltage is set by the average L.

The composite ‘point emitter’ model for the contact developed in this paper may also provide some support for this NI<sub>1</sub>NI<sub>2</sub>S model for the ‘finite bias anomaly’. An electron moving through the 2DEG past a point emitter would see that emitter as a scattering center, equivalent to an insulating barrier. The distance between the emitters in Sample 1 is of the order 100nm, less than the electron phase coherence length. In Sample 1, therefore, could be regarded as a type of NI<sub>1</sub>NI<sub>2</sub>NI<sub>3</sub> … S junction. Each normal metal region N would also be weakly localized. This model may also produce a finite bias anomaly, but would require further numerical support. A two-dimensional numerical simulation, where the electrons could actually move around the point emitter scattering centers, would be required to confirm this picture.

## IV Conclusions

We have measured the differential conductance of superconductor-normal metal junctions formed by diffusing Indium into AlGaAs/GaAs heterostructures. In grows into a AlGaAs/GaAs heterostructure having a  oriented surface preferentially along the {111} crystallographic planes. Instead of a planar diffusion profile, we therefore find that In forms ‘inverted pyramids’ or point contacts to the 2DEG. Supposedly ‘planar’ superconducting In contacts to the electron gas in an AlGaAs/GaAs heterojunction are therefore actually composed of many point emitters. Correlating the contact microstructure observed on different samples with the differential conductance spectroscopy of the NS contact allowed us both to explain many observed features in the conductance and to determine the mechanism of superconducting (ohmic) contacts to the 2DEG in this materials system.

For NS junctions annealed at a moderate temperature for a short times, so that the In point contacts do not physically touch the 2DEG, we obtain highly transmissive NS junctions. Due to the contact inhomogeneity, the point emitters nucleate and grow at different rates into the semiconductor. We observed wave interference between these different superconducting emitters in transmissive NS junctions. For identically prepared NS junctions annealed at higher temperatures and for longer times, so that the In point contacts grow together and have direct physical contact with the 2DEG, we obtain a lower transmission NS interface and Giaever tunneling. This is due to a depletion layer which forms around the In which directly touches the 2DEG. Further annealing simply increases the effective strength of the interface barrier between N and S, as regions of the In which previously were not in direct physical contact with the 2DEG come in contact with the 2DEG.

Since the semiconductor forming N is disordered and has a reasonable phase coherence length, weak localization corrections to the differential conductance around zero bias voltage are also observed in this materials system. This zero bias conductance peak is a correction to Giaever tunneling which has been previously observed by several other groups . We observed an additional dip inside this zero bias conductance peak which develops in some samples at low temperature . One possible explanation for the additional dip is due to contact inhomogeneity, where a small percentage of the contact is a nearly ballistic NS interface while most of the NS contact area remains in the tunneling limit. This conductance dip around zero bias voltage is therefore possible evidence for the predicted weak localization correction to the conductance of ballistic normal metal - superconductor junctions in Ref. . In any case, explanations for this ‘finite bias anomaly’ should account for the actual non-planar physical structure of the superconducting contact.

## V Acknowledgments

We gratefully acknowledge support from the David and Lucile Packard Foundation and from the MRSEC of the National Science Foundation under grant No. No. DMR-9400415. We thank Tamer Rizk, Richard Riedel, Manoj Samanta and Supriyo Datta for many useful discussions.

<sup>1</sup> Present address: Intel Corporation, RN2-40, 2200 Mission College Blvd. Santa Clara, CA 95052.

<sup>2</sup> Present address: Xilinx, 2100 Logic Dr., San Jose, CA 95124.

<sup>3</sup> Present Address: Yale University, Department of Electrical Engineering, New Haven, CT 06520.

<sup>4</sup> Present address: Dept. of Physics, University of North Florida, Jacksonville, FL 32224.