# Storage capabilities of a 4-junction single electron trap with an on-chip resistor

## Abstract

We report on the operation of a single electron trap comprising a chain of four Al/AlO<sub>x</sub>/Al tunnel junctions attached, at one side, to a memory island and, at the other side, to a miniature on-chip Cr resistor ($`R`$ 50 k$`\mathrm{\Omega }`$) which served to suppress cotunneling. At appropriate voltage bias the bi-stable states of the trap, with the charges differing by the elementary charge $`e`$, were realized. At low temperature, spontaneous switching between these states was found to be infrequent. For instance, at $`T=`$70 mK the system was capable of holding an electron for more than 2 hours, this time being limited by the time of the measurement.

PACS numbers: 73.23.Hk, 73.40.Gk, 85.30.Wx

The quality and complexity of Single Electron Tunneling (SET) devices, i.e. the circuits in which the tunneling of electrons is governed by the Coulomb blockade effect (see, for example, reviews  and ), are steadily growing. The increase of the number of junctions in these circuits is often motivated by the necessity to increase the Coulomb energy of the system and to reduce spontaneous cotunneling events.  These events, that are the higher-order processes, are associated with electron tunneling occurring in several junctions simultaneously and quantum-coherently. They set a limit to the accuracy of SET devices such as turnstiles and pumps (in which an ac signal of frequency $`f`$ applied to the gates clocks the transfer of single electrons), and the storing times of traps (capable to hold an electron on a memory node of the circuit for long periods). Because of the cotunneling, a 4-junction SET turnstile and a 3-junction pump  realize relation $`I=ef`$ with an accuracy of about 1% only, which is insufficient for their applications in metrology . The 4-junction SET traps made by Fulton $`et`$ $`al.`$  and Lafarge $`et`$ $`al.`$  had maximum trapping times as short as $`1`$ s.

In order to make these devices more accurate and reliable (that is to say, to reduce the probability of one of the most serious source of errors, namely the cotunneling), the number of series-connected junctions $`N`$ should be increased. As was recently demonstrated by Keller $`etal.`$ , the 7-junction SET pump driven by a 5 MHz signal had an error rate as low as 15 parts in $`10^9`$. In the static case, $`I=0`$, the duration for an electron to be kept in a trap also appreciably rises with $`N`$. For instance, the 7-junction trap of Dresselhaus $`et`$ $`al.`$  allowed electrons to be stored for several hours, this period beeing limited by the observation time. A similarly high storage capability was found for the 9-junction trap by Krupenin $`et`$ $`al.`$ 

On the other hand, increasing of $`N`$ is not the only way to suppress the cotunneling. As was theoretically shown by Odintsov $`et`$ $`al.`$  for the SET transistor and by Golubev and Zaikin  for the $`N`$-junction ($`N2`$) chain, a dissipative environment $`|Z(\omega )|=RR_k=h/e^226`$k$`\mathrm{\Omega }`$, can do a good job of suppressing the cotunneling. (The mechanism of this suppression is qualitatively similar to that of the Coulomb blockade in a single tunnel junction arising due to a high serial resistance. This resistor hampers charge relaxation in the electric circuit and, hence, drastically influences the tunneling rates.) They found the cotunneling contribution to the $`IV`$ curve of the chain at $`T=0`$ and at a small voltage $`V`$ to be

$$IV^{2(N+z)1},$$
$`(1)`$   
where $`z=R/R_k`$. As can be seen from Eq.(1), parameter $`z`$ can be regarded as a number of imagined tunnel junctions $`\mathrm{\Delta }N`$ attached to the $`N`$-junction chain and ensuring similar suppression of cotunneling as resistance $`R`$.

In this work we pioneered a dramatic reduction of the cotunneling in a multi-junction circuit (SET trap) by using a dissipative environment. We utilized an on-chip resistor of about 50 k$`\mathrm{\Omega }`$ (i.e. $`z2`$) to reduce cotunneling in a 4-junction chain with quite ordinary parameters. Since this resistor was roughly equivalent to two tunnel junctions, we expected the storage capability of this R-trap to be comparable to that of a 6-junction trap without resistor.

The sample, comprising the trapping array itself and the readout SET electrometer positioned near the memory island (see Fig. 1), was fabricated by the well-established shadow deposition technique  through the trilayer mask with ”hanging bridges” patterned by e-beam lithography and reactive-ion etching. Through the same mask, at three different angles ($`23^\mathrm{o},0^\mathrm{o}`$ and $`+12^\mathrm{o}`$), we consequently deposited $`in`$ $`situ`$ three metal layers: Cr (8 nm thick), then Al (30 nm), and after oxidation again Al (35 nm). All tunnel junctions on the chip had the same nominal dimensions, 80 nm$`\times `$ 80 nm, and, as was found from measurements of the electrometer transistor, their intrinsic capacitance was $`C160`$ aF and their tunnel resistance $`R_t70`$ k$`\mathrm{\Omega }`$. The memory island of the trap was nominally 80 nm$`\times `$ 2.2 $`\mu `$m and had a self-capacitance $`C_m`$ in the range of 100 aF. Each of three inner islands was about 80 nm$`\times `$ 300 nm in size. The Cr resistor was 8 $`\mu `$m long, 80 nm wide and its resistance ($`R50`$ k$`\mathrm{\Omega }`$) was evaluated from the measurement of similar single resistors fabricated apart on the same chip. 

The measurements were carried out in a dilution refrigerator within the temperature range $`T=70170`$ mK. A magnetic field of 1 T was applied perpendicular to the chip in order to keep Al parts of the circuit in the normal state. In the biasing lines we used $`\pi `$-filters against rf noise and the Thermocoax filters against the microwave frequency noise. The latter filters were the pieces (1 m long) of the coaxial cable lines (of diameter 0.5 mm) having considerable losses ($`>`$ 100 dB at $`f>10`$ GHz).  The cables were thermally anchored at the mixing chamber temperature and fed through into a shielding case containing the sample holder. In order to characterize the quality of filtering by an effective temperature $`T_e`$ referred to the sample, we had measured a test sample comprising a SET electrometer coupled to an electron box . The value $`T_e=5060`$ mK had been found from the switching characteristics of the box at $`T=20`$ mK. 

The presence of the memory island near the electrometer clearly manifested itself as regular jumps of output voltage $`V`$ in both the $`VV_g`$ and the $`VV_{tr}`$ characteristics of the electrometer. The change of the polarization charge $`\delta Q`$ on the electrometer island caused by charging of the memory island by an elementary charge was found to be $`(7.6\pm 0.5)\times 10^2e`$. This value was large enough to reliably monitor integer jumps of the charge on the memory node against a background noise. The modulation curves recorded for ramping $`V_g`$ or $`V_{tr}`$ in positive and negative directions formed typical hysteresis loops (the memory effect) , indicating that an electron enters into, or leaves, the memory island at the different values of bias. Neighboring loops were apart from each other and their positions were rather stable in time (i.e. the drift of the background charge was reasonably small). This proved that our trap had exactly two charge states within each loop (see Fig. 2). Since the inner islands of the chain were not supplied with individual tuning gates (as it was done in, e.g., Ref. ), we were not able to maximize the width of the loops by applying appropriate voltages which could compensate the random offset charges and, thereby, increase the energy barrier $`\mathrm{\Delta }U`$ separating the states. Instead, we simply chose the loops with larger widths, which presumably corresponded to favorable distributions of the offset charges ensuring larger $`\mathrm{\Delta }U`$.

The holding time within some of the loops (for instance, those marked in Fig. 2 as loops A and B) was found to be actually long. At $`T=70`$ mK, the hold time of the ”upper” and ”bottom” states for the bias corresponding to the centers of these loops was determined by the time of observation (more than 2 h). In another measurement, we ramped voltage $`V_{tr}`$ over loop B, starting from 10.8 mV and rising up to 11.8 mV at an average rate of $`5\times 10^8`$ V/s (i.e. 1 mV per 5.5 h). In response to the change of $`V_{tr}`$ the system switched from the initial ”bottom” state to the ”upper” state only once, i.e. the induced transition took place. (It occurred after a lapse of 2.5 h at $`V_{tr}11.25`$ mV, i.e. at the value inside the loop recorded at the normal sweep rate of $`1.5\times 10^4`$ V/s.) After that the system remained in that state until the end of the ramp, i.e. for about 3 h. At $`T=100`$ mK, transitions occurred on a reasonable time scale of about $`10^3`$ s when $`V_{tr}`$ was adjusted to the centers of the loops. When the bias was changed such that the energy of the occupied state exceeded the energy of the unoccupied state, induced switching occurred faster. Such case is illustrated by the time trace in Fig. 2.

In order to evaluate the barrier height we elevated the temperature and thereby made thermally activated switching between the bi-stable states more intensive. We then found from the Arrhenius plot the activation energy $`\mathrm{\Delta }U=240\pm 20\mu `$eV, what corresponds to $`2.8\pm 0.2`$ K, which characterizes the pair of the charge states for loop B. This value is plausible for the evaluated parameters of the trap if we assume non-zero offset charges on the inner islands on the chain. The rate $`\mathrm{\Gamma }_{th}`$ of thermally activated transitions at $`T100`$ mK for such barrier, extrapolated from higher temperature measurements, was found to be below $`2\times 10^6\mathrm{s}^1`$.

For a crude evaluation of the cotunneling rate $`\mathrm{\Gamma }_{cot}`$ we used formula (9b) obtained by Golubev and Zaikin , assuming the net energy change to be $`\mathrm{\Delta }Ek_BT`$. For $`T=70100`$ mK we obtained $`\mathrm{\Gamma }_{cot}10^{11}10^9\mathrm{s}^1`$ for our sample . The maximum rate of leakage evaluated from our short-term measurements was $`\mathrm{\Gamma }10^4\mathrm{s}^1`$, i.e. it is by several orders of magnitude higher than $`\mathrm{\Gamma }_{cot}`$. (Note that the experimental values of $`\mathrm{\Gamma }`$ are always much larger than theoretical estimations of both the thermal activation and cotunneling. ) On the other hand, the value obtained for $`\mathrm{\Gamma }`$ was considerably lower than that evaluated  for the case of a 4-junction trap with similar parameters but without resistor, $`viz.`$ $`\mathrm{\Gamma }_{cot}^{}10^310^2\mathrm{s}^1`$. This fact points to the crucial role the resistor plays in the improvement of the trap’s storage capability. In particular, the characteristics of this R-trap are comparable to those of the well-characterized 7-junction SET pump  in the hold mode of operation. That device had tunnel junctions of $`C220`$ aF and $`R_t470`$ k$`\mathrm{\Omega }`$, and 6 tuning gates allowed the leakage to be reduced down to $`(0.320)\times 10^4\mathrm{s}^1`$ at $`T=40`$ mK.

In summary, we have fabricated and characterized a 4-junction electron trap with an on-chip resistor. We have demonstrated the device is capable of storing a fixed number of electrons on its memory node on the appropriate time scale. We believe that almost similar storing capability can be achieved for a trap consisting of only 2 tunnel junctions and equipped with a resistor of $`R100`$ k$`\mathrm{\Omega }`$ which yields $`z4`$. (Our estimation gives in that case $`\mathrm{\Gamma }_{cot}10^7\mathrm{s}^1`$.) In such 2-junction trap, the electrostatic barrier (and thereby the storing time) could be effectively controlled by a gate polarizing the island between the junctions. The obtained result is extremely encouraging with respect to constructing a fewer-junction SET pump/turnstile device with resistors, which is our next goal. For instance, a 3-junction pump supplied with two 50 k$`\mathrm{\Omega }`$ resistors, yielding $`\mathrm{\Delta }N=z=2\times R/R_k4`$, could be as accurate as its 7-junction counterpart without resistors. The obvious advantage of such an R-pump is the minimum number of gates (two) and, hence, much simpler rf-drive (two harmonic signals with a fixed phase shift). Finally, the total drift of a working point of the device caused by the fluctuations of the offset charges on 2 islands should be apparently weaker than in the case of 6 similar islands.

The authors thank V. A. Krupenin for valuable discussions. The work is supported in part by the EU (MEL ARI Research Project $`22953`$ CHARGE) and the German BMBF (Grant No. 13N7168).