title: VHDL initialize vector (the length is not a multiple of 4) in hex
body: <p>For example, I have a vector which length is 10.
  How can I initialize it in hex. (The synthesize tool complains size mismatch as it thinks the hex value is a multiple of 4)</p>
  
  <pre><code>signal v : std_logic_vector (9 downto 0)    := x"11A";
  </code></pre>
  
  <p>Many thanks!
  Nigong</p>