title: Best-case instruction throughput on ARM NEON
body: <p>What is the best-case instruction throughput for a compute-bound algorithm coded in ARM-NEON?</p>
  
  <p>For example, if I have a simple algorithm based on a large number of 8-bit->8-bit operations, what is the fastest possible execution speed (measured in 8-bit operations per cycle) that could be sustained if we assume full latency hiding of any memory I/O.</p>
  
  <p>I am initially interested in Cortex-A8, but if you also have data for different processors, please note the differences.</p>