title: Design with MicroBlaze has more instantiated block-RAMs than device capacity. Consider targetting to a different part
body: <p>I have a design which is using the Xilinx part: XC7A100T (FGG484ABX21), the environment: WIN10 19043.1348, VIVADO 2018.3. According to the datasheet: <a href="https://www.xilinx.com/content/dam/xilinx/support/documentation/selection-guides/cost-optimized-product-selection-guide.pdf#A7" rel="nofollow noreferrer">https://www.xilinx.com/content/dam/xilinx/support/documentation/selection-guides/cost-optimized-product-selection-guide.pdf#A7</a>, XC7A100T should have <em><strong>4,860 Kb</strong></em> (4860*1000/8/1024=<em><strong>593 KiB</strong></em>) BRAM, and I am using only <em><strong>512 KiB</strong></em> of them.</p>
  <p>The Memory Address Assignment is as follows:
  <a href="https://i.stack.imgur.com/46wg2.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/46wg2.png" alt="enter image description here" /></a></p>
  <p>VIVADO throws me the error when I try to do the synthesis:
  <a href="https://i.stack.imgur.com/JJh46.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/JJh46.png" alt="enter image description here" /></a></p>
  <p>What could be wrong? Thank you!</p>