title: Integration of VIP developed in VMM into my UVM testbench
body: <p>I have developed testbench using UVM methodology in system verilog for my whole system DUT.
  I have a VIP procured, which is in VMM methodology in system verilog. How do I integrate this VIP (in VMM) into my UVM testbench?</p>
  
  <p>Thanks.</p>