title: What is odd-even register pairing in Sparc processor?
body: <p>A Sparc simulator that I have gave me <code>Trap: illegal_instruction, Destination is an odd-even register pair</code> for an <code>ld</code> instruction.</p>
  <p>What exactly is the odd-even pairing in the processor? Does it have something to do with memory alignment? I have gone through the manual but it wasn't explained in detail.</p>