title: Can I call a VHDL function inside Verilog
body: <p>I am currently trying to use certain legacy VHDL codes into my Verilog design. While it is possible to instantiate VHDL modules within Verilog, I could not find a way to call VHDL functions within Verilog. (Apart from wrapping it around in a VHDL module and instantiating the module). Is there anyway to directly call VHDL functions within Verilog?</p>