title: PIC24 PicKit3 can't debug
body: <p>I'm trying to debugging my code on the PIC24F04KA200. But when i start debugging, i get the message: 
  <em>The target device is not ready for debugging. Please check your configuration bit settings and program the device before proceeding. The most common causes for this failure are oscillator and/or PGC/PGD settings.</em></p>
  
  <p>I readed the PicKit3 User guide, but i don't find the answer. The PicKit is connected to the PGC2 and PGD2 pins. My configuration bits:</p>
  
  <pre><code>/* 
   * File:   config.h
   *
   */
  
  #ifndef CONFIG_H
  #define CONFIG_H
  
  #ifdef  __cplusplus
  extern "C" {
  #endif
  
  #ifdef  __cplusplus
  }
  #endif
  
  #endif  /* CONFIG_H */
  
  
  #include &lt;p24F04KA200.h&gt;
  
  
  // PIC24F04KA200 Configuration Bit Settings
  
  // 'C' source line config statements
  
  #include &lt;xc.h&gt;
  
  // FBS
  
  // FGS
  #pragma config GWRP = OFF               // General Segment Code Flash Write Protection bit (General segment may be written)
  #pragma config GCP = OFF                // General Segment Code Flash Code Protection bit (No protection)
  
  // FOSCSEL
  #pragma config FNOSC = FRCDIV           // Oscillator Select (8 MHz FRC oscillator with divide-by-N (FRCDIV))
  #pragma config IESO = OFF               // Internal External Switch Over bit (Internal External Switchover mode disabled (Two-Speed Start-up disabled))
  
  // FOSC
  #pragma config POSCMOD = NONE           // Primary Oscillator Configuration bits (Primary oscillator disabled)
  #pragma config OSCIOFNC = ON            // CLKO Enable Configuration bit (CLKO output disabled)
  #pragma config POSCFREQ = MS            // Primary Oscillator Frequency Range Configuration bits (Primary oscillator/external clock input frequency between 100 kHz and 8 MHz)
  #pragma config SOSCSEL = SOSCHP         // SOSC Power Selection Configuration bits (Secondary oscillator configured for high-power operation)
  #pragma config FCKSM = CSECMD           // Clock Switching and Monitor Selection (Clock switching is enabled, Fail-Safe Clock Monitor is disabled)
  
  // FWDT
  #pragma config WDTPS = PS32768          // Watchdog Timer Postscale Select bits (1:32,768)
  #pragma config FWPSA = PR128            // WDT Prescaler (WDT prescaler ratio of 1:128)
  #pragma config WINDIS = OFF             // Windowed Watchdog Timer Disable bit (Standard WDT selected; windowed WDT disabled)
  #pragma config FWDTEN = OFF             // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
  
  // FPOR
  #pragma config BOREN = BOR0             // Brown-out Reset Enable bits (Brown-out Reset disabled in hardware; SBOREN bit disabled)
  #pragma config PWRTEN = OFF             // Power-up Timer Enable bit (PWRT disabled)
  #pragma config BORV = LPBOR             // Brown-out Reset Voltage bits (Low-Power Brown-out reset occurs around 2.0V)
  #pragma config MCLRE = ON               // MCLR Pin Enable bit (MCLR pin enabled; RA5 input pin disabled)
  
  // FICD
  #pragma config ICS = PGx2               // Reserved (PGC2/PGD2 are used for programming the device)
  
  // FDS
  #pragma config DSWDTPS = DSWDTPSF       // Deep Sleep Watchdog Timer Postscale Select bits (1:2,147,483,648 (25.7 Days))
  #pragma config DSLPBOR = OFF            // Deep Sleep Zero-Power BOR Enable bit (Deep Sleep BOR disabled in Deep Sleep)
  #pragma config DSWDTEN = OFF            // Deep Sleep Watchdog Timer Enable bit (DSWDT disabled)
  </code></pre>
  
  <p>And my main file:</p>
  
  <pre><code>/* 
   * File:   main.c
   */
  #include "config.h"
  #include &lt;stdio.h&gt;
  #include &lt;stdlib.h&gt;
  
  
  int main(int argc, char** argv)
  {
      while(1)
      {
          ;
      }
  }
  </code></pre>
  
  <p>The processor is running. I have a blinkerLed program running. 
  Does anyone have a suggestion?</p>