title: Can a SysTick exception in Cortex-M4 preempt itself?
body: <p>I have a handler for SysTick exception which counts ticks and calls other functions (f1, f2, f3) whose execution time can be longer than SysTick period. These functions set and clear their active status (global variables) so if a SysTick exception occurs it can detect an overload and return to interrupted function. </p>
  
  <p>I have assigned fixed priority to SysTick exception (let's say 16). I want to somehow make possible for SysTick to generate an exception regardless of it's prior active status, go to SysTickHandler, increase tick counter and return to interrupted function. </p>
  
  <p>One solution which may be useful is to use BASEPRI. It can be set to priority lower than SysTick so it would enable that exception. Unfortunately, using BASEPRI got me nowhere because nothing happened (I set it to max value). BASEPRI value was 0 inside SysTickHandler before I changed it. Should that value be equal to SysTick priority when processor enters handler function? Is exception priority loaded automatically in BASEPRI? </p>
  
  <p>I have also considered for NVIC to have an issue with preempting already active exception but found nothing regarding that in ARM documentation.</p>
  
  <p>Also, return from handler when oveload is detected could set the processor state to thread mode. Let's ignore that for now.</p>
  
  <pre><code>void SysTickHandler(void) { 
      ticks++;
      //set_BASEPRI(max_value);
      if (f1_act || f2_act || f3_act) return;
      else {
          f1();
          f2();
          f3();
      }
  }
  </code></pre>
  
  <p>A simpler example for this problem (without return) would be to increase tick counter when having an infinite loop inside handler.</p>
  
  <pre><code>void SysTickHandler(void) {
      ticks++;
      set_BASEPRI(max_value);
      while(1);
  }
  </code></pre>