The mathematical formulation was coded in OPL using ILOG ( 25) and implemented on an Intel Core™ i5-2500 CPU @ 3.30 GHZ and 8.00GB RAM.
The performance of the case study was evaluated by means of total passenger travel time, missed transfers, average cycle time and the percentage of bus bunching occurring. The PT network has been simulated for handling the concept of synchronized transfers and generating input data for optimization. The mathematical formulation was coded in OPL using ILOG ( 25) and implemented on an Intel Core™ i5-2500 CPU @ 3.30 GHZ and 8.00GB RAM. The execution time of the procedure varies from 7–12s for a