ecl operates in ____ and ____ regions of the transistor
Emitter-coupled logic At low input voltage (logical "0") or at high input voltage (logical "1") the differential amplifier is overdriven. The transistor (T1 or T3) is cutoff and the other (T3 or T1) is in active linear region acting as a common-emitter stage with emitter degeneration that takes all the current, starving the other cutoff transistor.The active transistor is loaded with the relatively high emitter resistance RE that introduces a significant negative feedback (emitter degeneration). To prevent saturation of the active transistor so that the diffusion time that slows the recovery from saturation will not be involved in the logic delay,[2] the emitter and collector resistances are chosen such that at maximum input voltage some voltage is left across the transistor. The residual gain is low (K = RC/RE < 1). The circuit is insensitive to the input voltage variations and the transistor stays firmly in active linear region. The input resistance is high because of the series negative feedback. The cutoff transistor breaks the connection between its input and output. As a result, its input voltage does not affect the output voltage. The input resistance is high again since the base-emitter junction is cutoff.