While different synthesis tools have different capabilities, there exists a common synthesizable subset of VHDL that defines what language constructs and idioms map into common hardware for many synthesis tools.
Iako različiti alati za sintezu imaju različite mogućnosti, postoji zajednički sintetizovani podskup VHDL-a koji definiše koji jezički konstrukti i idiomi mapiraju u obični hardver za mnoge alate za sintezu.