From Serial ATA Storage Architecture and Applications


Refers to user adoption of Serial ATA, where Serial ATA is often seen in homes and businesses.
Acronym for cyclic redundancy check. Used to verify the integrity of a transmission in a way similar to a checksum.
Command FIS.
A frame information structure that carries an ATA command (not a data payload) see also FIS and Data FIS.
Common Mode Voltage.
The voltage that is common to both sides of a differential circuit pair. If the line is perfectly balanced, the common mode voltage is cancelled.
Data Dependent Jitter.
Transmission of clock pattern to non-clock pattern, including inter-symbol interference.
Data FIS.
A frame information structure that carries a payload of data, not an ATA command. See also FIS and Command FIS.
Deterministic Jitter.
Systematic jitter that is not characterized by
Gaussian distribution probability.
Deterministic jitter includes duty cycle distortion jitter, sinusoidal jitter, data dependent jitter and uncorreleated jitter.
A computer peripheral, such as a hard disk drive. For this book, device almost always means a hard disk drive with a Serial ATA interface.
Acronym for electromagnetic interference.
Acronym for frame information structure. See also Data FIS and Command FIS.
Gbps or Gb/s.
Abbreviation of gigabits per second.
Gen 1 Speed.
1.5 gigabits per second, defined in the Serial ATA 1.0 specification.
Gen 2 Speed.
3.0 gigabits per second is targeted, but not guaranteed. This book pre-dates the Serial ATA specification that defines the Gen 2 signal timings.
Acronym for host bus adapter sometimes...
Copyright Intel Corporation 2003 under license agreement with Books24x7

Products & Services
RAID Products
RAID Disk Arrays
Network Clock Sources
Network clock sources are timing devices that use a signal from an atomic clock or other external reference source to set and maintain a central time for all of the elements in a network.
Fiber Optic Transponders
Fiber optic transponders are devices that receive, amplify, and retransmit optical signals on different wavelength channels.
Hard Drives

Topics of Interest

Although the initial Serial ATA transfer rate of 150 megabytes per second is higher than the available transfer rates for parallel ATA, the overhead incurred by serializing and packetizing the traffic...

Overview The Transport layer protocol defines the sequences of FISes that can be transmitted across the interface. Because the Link layer handles everything involved in reliably delivering a FIS, the...

Oscilloscopes have been used extensively to analyze the jitter performance of serial data links providing estimates (measurements) of total jitter as well as its "random" and "deterministic" parts.

Overview The Link layer is the portion of the interface that is responsible for encoding transmitted data, for decoding received data, and for basic communications and protocol. Because the Link...

Overview For Serial ATA to be an attractive replacement for parallel ATA in the mobile market segment, it is essential that it have power consumption and management attributes suitable for the mobile...