2. What is the difference between = and == in C?

'=' in c is the assignment opperator.whereas '==' is the
logical equality operator.

3. What are the total number of lines written by you in C/C++? What compiler was used?

here we use the lines depends on the programme.But we have
65536 lines which are available in it

4. What is VHDL and/or Verilog?

vhdl is very high speep integrated chips hardware
descripted language and verilog is to verify logic


This is a signal integrity question for board designers.
there are two types of termination schemes viz. series and
parallel termination. series termination is where a resistor
of small value ( rule of thumb 1/2 of characteristic
impedance of the trace ) placed near the source ( near
driver). the parallel termination is a combination of two
resister ( rule of thumb twice the char. impedance f the
trace) placed near the destination ( input) where one
resistor connects the signal trace to the VCC and other
connects to the GNd.

6. In what cases do you need to double clock a signal before presenting it to a synchronous state machine?

if the input signal is asynchronous with the clock (state
machine clock), then you need to double clock the same
signal to synchronize with the state machine clock.

7. Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads?

State machine to detect 3 consecutive heads appearing in
multiple tosses;

state 1 : initial state
As long as the toss results in TAIL , in this state
If the toss results in HEAD go to state 2
state 2 : HEAD1 resulted
in the next toss , If TAIL is resulted go to
the initial state1 . If HEAD is resulted go to
state3 : HEAD2 is resulted
in the next toss , If TAIL is resulted go to
the initial state1 . If HEAD is resulted go to
state4 : HEAD3 is resulted and this is the final state
As long as the HEAD results in each next toss
be in state 4. If any toss results in TAIL go to
initial state1

8. What is the term snooping?

Let's take an example of different processors(along with
their independent caches) sharing the same memory system.

Now if this memory is a Read-Write memory and let's say
that one of the processors writes to this memory after some
data computation, all the processors need to update their
individual cache copies of the now modified memory. To do
this the concept of snooping is implemented. cache snooping
is the means by which each cache constantly
monitors/detects the bus for any write to a memory location
and if a write is found, it invalidates it current copy of
cached memory data and copies the new content over.

9. Explain the difference between write through and write back cache?

Write Through. After writing in cache memory, main memory is
updated too inmediatly to mantain reliability

Write Back After writing in cache memory a flag bit called
dirty bit is set. When this value need to be replaced that
bit is check, if it is set then the value is taken to main