10 comments on “SPARCSIM

  1. Hey Dipanjan,

    I am trying to use your sparcsim (tried both v1.0 and v2.0) simulator in one of my academic assignments. I compiled c-programs using leon bcc (from http://www.gaisler.com/doc/libio/bcc.html) and tried to run the generated executable on your simulator and have encountered the following problems:

    1. The simulator is terminated reporting a run-time error (stack smashing). This is what I tried to do:
    $ ./sparcsim test.out
    sparcsim> go 0x40000000
    2. To avoid the stack smashing error at runtime I recompiled the simulator adding -fno-stack-protector flag. There are no run time errors this time but the simulator reports “Trap: illegal_instruction, Destination is an odd-even register pair”. I tried to run various executables and the simulator still reports the same errors.

    I understand that only a sub-set of instructions from sparc v8 are supported by the simulator. I checked the assembly of the source code against the list you published and all the instructions seem to be on the list.

    So I have the following question for you:

    1. Do you have any suggestions on compiling c-programs which can run without any problem on your simulator?

    p.s. All the executables work fine when I run them on eval version tsim2.0.

    Thank you.


  2. Hi Adithya,

    TSIM 2.0 works happily with mis-aligned register pair load. If you attempt to load an odd-even register pair (which should ideally be the other way round), it silently loads the pair with TBR.tt field set. SPARCSIM, in turn, is stricter in complaining about traps, at least that was the intended behavior for the application it was originally developed. Let me quote page 89 of SPARC v8 instruction manual:

    “An attempt to execute a load double word instruction that refers to a mis-aligned (odd) destination register number may cause an illegal_instruction trap.”

    I suspect that you have used some LOAD/STORE double-word instruction which exhibits this behavior. If the assembly is not too bulky, can you post it here?

    Personally, I haven’t used BCC cross-compiler, but that shouldn’t be the problem. GNATforLEON and cross-compiling gcc from source for SPARC platforms – these alternatives should work fine, too.

  3. Hi Dipanjan,
    Can you please tell about the installation procedure of SPARCSIM. As there is no README file in that. Also can you please briefly explain how SPARCSIM works.

  4. Hi Dipanjan,

    I am facing the same problems what Aditya has already mentioned. I am using GNATforLEON (built from sources by myself) compiler. The ldd/std instructions seem to be correct (in the sense destination register is even) from the disassembly. Is there any way you can tell the insrtuction / PC where trap has occured?

    Thanks in advance,

    (PS : I am also a part of ISRO :) )

  5. @Suja

    Are you issuing a GO command at the very beginning? If so, then the simulator tries to execute instructions right from the first instruction of CODE segment.

    Rather, I’d suggest you to isolate LDD/SDD instruction, assemble it to an executable using GNATforLEON, load it to simulator and get the disassembly ([d]is [addr] [count]) from the simulator. Please check whether disassembly looks fine and let me know.

  6. Hi,

    At last I could find where the trap occurs.. Its not in LDD/STD. Its in a LD instruction only.

    sparcsim> step
    4000140C: C2 00 40 00 ld [ %g1 + %g0 ], %g1
    Trap: illegal_instruction, Destination is an odd-even register pair

    Any views?

    Thanks in advance

  7. Hi Suja,

    May I know the OS version, 32/64 bit , gcc version you used to compile SPARCSIM?

    Also, did you set any pre-execution environment by loading PSR/PC/nPC etc. prior to executing the program?

  8. Hi,

    Thanks for the reply..
    I am using Ubuntu 12.04 precise, 32-bit, 3.2 kernel.
    I have used gcc v4.6.3 to compile sparcsim.
    I am not setting any pre-execution environment.

    And I did some small modifications in execute.c to avoid those errors. I commented the block of code which was setting trap because of misaligned registers when the opcode is ld. (Line no 478 to 484)
    And for opcode rett,
    setRegister(tokens[index], regPC);
    was not working properly and found it works correctly if index is 1.
    So added a statement to assign index with 1.
    I am not very sure, what I did is really required or not. But some errors I could reduce.

    I have a very simple program to add two numbers. SPARCSIM hangs with a window overflow trap the moment I give go 0x40000000 with the executable compiled using GNATforLEON. But if I compile it using AdaCore compiler, then there is no trap, but no output also. It looks as if it hangs or in an infinite loop. I am not getting the prompt.

    • Hi Suja,

      I think it was my mistake to check for misaligned registers for LD instructions. Because SPARC v8 standard says,

      “An attempt to execute a load doubleword instruction

      I have made small modification to the code. Modified code is uploaded here. Can you please give a try and report back?

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