def getLoops(self):
        fsms = self.getFiniteStateMachines()
        loops = {}
        for signame, fsm in fsms.items():
            loop_set = fsm.get_loop()
            if len(loop_set) == 0: continue
            if not loops in signame: loops[signame] = set([])
            loops[signame].update(loop_set)
        return loops, fsms
dataset/ETHPy150Open PyHDI/Pyverilog/pyverilog/controlflow/controlflow_analyzer.py/VerilogControlflowAnalyzer.getLoops/swapped operands of `in`