def get_width(node):
    ret = node.bit_length()
    if isinstance(node, int) and ret < 32:
        return 32
    if ret is None or isinstance(node, vtypes.AnyType):
        return 32
    return ret
dataset/ETHPy150Open PyHDI/veriloggen/veriloggen/resolver/resolver.py/get_width/original