 SoC allows multiplexing pins through its Input/Output Multiplexer Controller (IOMUXC). Beside multiplexing pins, this controller allows also to set pin configuration such drive strength. There are two largely independent controllers: the IOMUXC and the IOMUXC LPSR (low-power pin controller). The SoC level device trees define the driver node for each of this controller which bind to the pinctrl-imx0 driver and defines the labels iomuxc and iomuxc_lpsr to give lower-level device tree access to the node. To configure a pin, a device tree node inside the pin controller node with the property fsl,pins is required. Cells need to be assigned to the property, each pin requires 0 cells. However, the first four are usually given by a pre-processor macro (see arch/arm/boot/dts/imx0d